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Found 2 results

  1. Hi evryone ! I can't understand my problem, I have nothing on the console SDK. Knowing that I have the right driver and i successfully program FPGA and I'm on the right port. I am using Vivado 2016.2 ubunto linux and Zybo-z7-10 as board in vivado I create another project and I clean but the problem still persists ! plzz help ! I want just display a hello world with a simple a bitstream (Axi lite generated by vivado).
  2. Hello experts, I'd like to use the all signals of the pmods (excepted MIO pmod) as single ended lines. I have read the post: however there are no description how to set the ports as a single ended lines. I have tried to make it straight forward in the ucf file as following: NET "line1" LOC=W19 | IOSTANDARD=LVCMOS33; #IO_L22N_T3_34 NET "line2" LOC=W18 | IOSTANDARD=LVCMOS33; #IO_L22P_T3_34 Unfortunately all signals with "N" (e.g. IO_L22N_T3_34) are set to -3.3V (MINUS 3.3V measured to ground) if I set the output "HIGH". How can I use this differential pair as single ended with +3.3V (PLUS 3.3V) as HIGH output and (ZERO) 0V as "LOW". (Measured to ground) Thanks in Advance