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Found 3 results

  1. Hello, I got an old but good Digilent' Spartan-3 starter board, with the Hs1 JTAG calbe - all bought from Digilent at some stage. I've installed latest ISE from Xilinx - ISE 14.7, Linux version. I also downloaded & installed latest Digilent cable drivers or plug-ins for the ISE to find JTAG and connect to the board. I see that it appears to get loaded correctly, and I get a trace in the log Digilent driver version xx.xxx loaded. But, it's always says , no JTAG found ! I've spent hours, hours & hours trying to see why not, reinstalling drivers, examining udev hotplug rules, etc etc .. The device is recognized by the Linux kernel as a USB dev, and sees it as the FTDI chip, and then triggers the ftdi_sio driver. Which is then looks like to trigger some digilent special app, which is called, but it's silent, no output, I have no idea if it succeeds. But there are two /dev/ttyUSBx devs that get created - is there any other chip that's suppose to be recognized there ?? I don't see anything but USB to Serial on this cable. Another weird thing is, if I start & run the command line tool XMD from ISE (don't ask, I accidentally found it.. I 'm new to this), and , in it's shell, I ran this: connect mb mdm Then it prints a list of available devices which are actually on that board, device id and IDe code, and Part name - and the part names match what should be on that board... So this tool somehow finds something connected on the cable, yet, that Digilent plug-in for the ISE always says no JTAG. Digilent: please help ?
  2. I am trying to load my program to a Block RAM using Data2mem, after the bitfile is generated. Here are the steps: I have generated a BLOCK RAM as single port ROM with 32 bit-width and 16384 bit-depth. Then translated the design without any BMM file and looked at the PlanAhead tool to see which BRAM are used and which ramloop is assigned. There are 15 ramloop lines. There are 14 PRIM36 primitives and 1 PRIM18 primitive as shown below: BROM_instance/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/v5_init.ram/SP.SINGLE_PRIM18.SP **(RAMB18)** BROM_instance/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[1].ram.r/v5_init.ram/SP.SINGLE_PRIM36.SP **(RAMB36_EXP)** BROM_instance/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[2].ram.r/v5_init.ram/SP.SINGLE_PRIM36.SP (RAMB36_EXP) BROM_instance/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[3].ram.r/v5_init.ram/SP.SINGLE_PRIM36.SP (RAMB36_EXP) ⋮⋮ BROM_instance/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[14].ram.r/v5_init.ram/SP.SINGLE_PRIM36.SP (RAMB36_EXP) I wrote the following .BMM file for address the ROM from 0x0000 to 0xFFFF. and add it to the xilinx project. ADDRESS_SPACE pr_mem1 RAMB32 [0x00000000:0x0000ffff] BUS_BLOCK BROM_instance/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[0].ram.r/v5_init.ram/SP.SINGLE_PRIM18.SP [31:0]; END_BUS_BLOCK; BUS_BLOCK BROM_instance/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[1].ram.r/v5_init.ram/SP.SINGLE_PRIM36.SP [31:0]; END_BUS_BLOCK; BUS_BLOCK BROM_instance/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[2].ram.r/v5_init.ram/SP.SINGLE_PRIM36.SP [31:0]; END_BUS_BLOCK; BUS_BLOCK BROM_instance/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[3].ram.r/v5_init.ram/SP.SINGLE_PRIM36.SP [31:0]; END_BUS_BLOCK; BUS_BLOCK ⋮⋮ BROM_instance/U0/xst_blk_mem_generator/gnativebmg.native_blk_mem_gen/valid.cstr/ramloop[14].ram.r/v5_init.ram/SP.SINGLE_PRIM36.SP [31:0]; END_BUS_BLOCK; END_ADDRESS_SPACE; But when I tried to compile it again it gives me the error: ERROR:Data2MEM:29 - Inconsistent address space size in ADDRESS_SPACE 'pr_mem1'. Can you please help me out where the error is occurring? Is ramloop[xx] correctly used?
  3. noob_fpga

    xilinx ISE errors

    So far I have no lucky to get digilend own software, to regonize my new spartan cmod s6 noard, so what I'm try to use for now, is Xilinx ISE v.14.7. The OS what I'm using, is windows 10, 64-bit. ISE freezes several situations, randomly. Example it shut down istantly with any time for now, when I'm try to open project. I googled some similiar issues that some other ISE users have, tried one, which didn't work , finally installed Dependency Walker apllication, which I had to open _pn.exe and see ,if there were something wrong, so is there anone who had some similiar issues and know what's going on and can help how to fix my problem. So here is the results, in text file. Xilinx ISE, which I installed, has the free webpack licence. _pn.txt Installing the softwae again, still needing help. I will notify if I have fixed this issue for myself. E: Ithink some file(s) have corrupted or/and missing. hopefully there is some othersolution that, I have to reinstall whole ISE package(which doesn't fix some random occuring errors, which I get in the beginning, just after first starting the apllication,as well.