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Found 48 results

  1. Kampi

    XADC - AD7 sampled on AD14

    Hello, I have a Zybo Board (Version 1 Rev. and I have a strange Issue with my XADC which samples the input for the channel AD7 on the channel AD14. Please take a look at my setup. I want to use the differential Channelpair 7 and 15 (like in the Photo - upper row VIn and lower row ground from my voltage source). My software gives me the results for channel 14 and 15 and the value for channel 7 stays constant even when I increase or decrease the input voltage. Only channel 14 and 15 change her values. I expect that channel 14 stays constant and channel 7 change his value. Temperature: 46.1576 Degree Celsius Vcc INT: 0.9961 V Vref+: 1.25 V Vref-: 3.00 V Channel 7: 2351 Channel 14: 26032 Channel 15: 32767 My code looks like this #include "stdio.h" #include "xparameters.h" #include "xadcps.h" XAdcPs XAdc; XAdcPs_Config* ConfigPtr; int main() { ConfigPtr = XAdcPs_LookupConfig(XPAR_XADC_DEVICE_ID); if(ConfigPtr == NULL) { xil_printf("Invalid XADC configuration!"); return XST_FAILURE; } XAdcPs_CfgInitialize(&XAdc, ConfigPtr, ConfigPtr->BaseAddress); if(XAdcPs_SelfTest(&XAdc) != XST_SUCCESS) { xil_printf("Self test failed!"); return XST_FAILURE; } XAdcPs_Reset(&XAdc); XAdcPs_SetSeqChEnables(&XAdc, XADCPS_SEQ_CH_AUX07 | XADCPS_SEQ_CH_AUX14 | XADCPS_SEQ_CH_AUX15); XAdcPs_SetSequencerMode(&XAdc, XADCPS_SEQ_MODE_CONTINPASS); xil_printf("Start...\n\r"); while(1) { u32 Temp = XAdcPs_GetAdcData(&XAdc, XADCPS_CH_TEMP); printf("Temperature: %.4f Degree Celsius\n\r", XAdcPs_RawToTemperature(Temp)); u32 VCCInt = XAdcPs_GetAdcData(&XAdc, XADCPS_CH_VCCINT); printf("Vcc INT: %.4f V\n\r", XAdcPs_RawToVoltage(VCCInt)); u32 VREFp = XAdcPs_GetAdcData(&XAdc, XADCPS_CH_VREFP); printf("Vref+: %.2f V\n\r", XAdcPs_RawToVoltage(VREFp)); u32 VREFn = XAdcPs_GetAdcData(&XAdc, XADCPS_CH_VREFN); printf("Vref-: %.2f V\n\r", XAdcPs_RawToVoltage(VREFn)); u32 Ch7 = XAdcPs_GetAdcData(&XAdc, XADCPS_CH_AUX_MIN + 7); xil_printf("Channel 7: %lu\n\r", Ch7); u32 Ch14 = XAdcPs_GetAdcData(&XAdc, XADCPS_CH_AUX_MAX - 1); xil_printf("Channel 14: %lu\n\r", Ch14); u32 Ch15 = XAdcPs_GetAdcData(&XAdc, XADCPS_CH_AUX_MAX); xil_printf("Channel 15: %lu\n\r", Ch15); xil_printf("-------------\n\r"); for(u32 i = 0x00; i < 0xFFFFFF; i++); } return XST_SUCCESS; } With the following XDC file: ##Pmod Header JA (XADC) set_property IOSTANDARD LVCMOS33 [get_ports Vaux14_v_n] set_property IOSTANDARD LVCMOS33 [get_ports Vaux14_v_p] set_property PACKAGE_PIN N16 [get_ports Vaux14_v_n] set_property IOSTANDARD LVCMOS33 [get_ports Vaux6_v_n] set_property IOSTANDARD LVCMOS33 [get_ports Vaux6_v_p] set_property IOSTANDARD LVCMOS33 [get_ports Vaux7_v_n] set_property IOSTANDARD LVCMOS33 [get_ports Vaux7_v_p] set_property IOSTANDARD LVCMOS33 [get_ports Vaux15_v_n] set_property IOSTANDARD LVCMOS33 [get_ports Vaux15_v_p] So what is going wrong here?
  2. Hello, I am using the Nexys A7-100T board.And I'm able to successfully read external input voltages on XADC Demo provided in the "https://github.com/Digilent/Nexys-A7-100T-XADC ". I want to measure external input voltage(taken from measurement system) and show the parameter on PC. Now I try to modify the XADC Demo program,but I am still a beginner so I can't succeed. Please let me know how to do for making program. thanks marimo
  3. Hello, I am kind of new to FPGAs and I am trying to use the XADC in order to monitor the temperature sensor: I am using Vivado 2018.2, Nexys video as a board. I used the IP catalog in order to set up the XADC as following: DRP, Single channel, continuous, disable all alarms, disable reset_in, channel to monitor: temperature I wrote a top level module which reads the bits 4 up to 7 from do_out and light up LEDs accordingly: //part of the top module: module top( input CLK100MHZ, input vp_in, input vn_in, input [1:0] sw, output reg [11:0] LED ); wire enable; wire ready; wire [15:0] data; reg [6:0] Address_in; xadc_wiz_0 XLXI_7 (.daddr_in(Address_in), //addresses can be found in the artix 7 XADC user guide DRP register space .dclk_in(CLK100MHZ), .den_in(enable), .di_in(0), .dwe_in(0), .busy_out(), .vn_in(vn_in), .vp_in(vp_in), .alarm_out(), .do_out(data), .eoc_out(enable), .channel_out(), .drdy_out(ready)); always @( posedge(CLK100MHZ)) begin if(ready == 1'b1) begin case (data[7:4]) 4'b0001: LED <= 12'b000000000001; 4'b0: LED <= 12'b0; 4'b1000: LED<=12'b000000000010; default: LED <= 12'b1; endcase end end ///// I have one problem though, as I come to set the address of the ddr_in as done in a documentation found here which has LEDs displaying potential differences monitored by XADC, I do not understand what 8 bit address I should assign for the DRP to monitor the Temperature Channel ! "Address_in <= 8'h ????" My goal: I need the LEds to display something for the sake of demonstration that I am able to read values out of the do_out. Thank you for your help.
  4. Hi, Problem : I am new to FPGA and I would need to understand how to read an Analog input through the XADC to analyze it on the board and then be able to accordingly output a trigger for other machines. One simple thing that I would try to do for the time being is to read in the analog signal and wire it to a led so that I could effectively see the code is working. How do I do that ? Finally, one extra constraint is that I have to limit as much as possible the use of the Zynq processor (I'm not really sure this is achievable, please excuse my lack of knowledge). Product : I use the Zybo Z7 board XC7Z010-1CLG400C and Vivado Design Suite 18.3 What I have tried : I think the tutorial I've seen that best suits be needs is this one : https://cdn.instructables.com/ORIG/FRT/SYN1/IWMMH04D/FRTSYN1IWMMH04D.pdf Everything is alright until it comes to copy the instantiation template into the wrapper. I'm not really sure of how this works. After that, it is said there that the Digital input I'm interested in is named "daddr_in" ==> how should I extract it then to - let's say - connect it to a led ? Please find the Constraint file and project in the attached files and let me know if you need more. I have also made other attempts through this : http://realisenow.sdu.dk/using-the-xadc-on-the-zybo-board/ Hence a question on the fly : when I open the SDK and enter a code in C, then I'm starting to ork on the PS isn't it ? Finally, I have also tried the XADC demo project on the digilent website but couldn't sort out how to adapt it to my needs. Thank you in advance for your healp, ! Zybo-Z7-Master.xdc design_1_wrapper.v xadc_wiz_0.v
  5. I'm attempting to use all 6 single ended ADC channels of the PYNQ-Z1 board with DRP enabled and with continuous sequencing (see attached configuration). According to the 7-series XADC guide UG480 on page 72, "When XADC is being operated in a sequence mode, you can identify the channel being converted by monitoring the channel address (CHANNEL[4:0]) logic outputs. The multiplexer channel address of the channel being converted is updated on these logic outputs when BUSY transitions Low at the end of the conversion phase." But the output of the channel (channel_out) is always zero, which I've worked around by outputting the previously selected channel with the data on the EOS signal. The issue is that it seems some of my samples are being labeled incorrectly, for example with a 500Hz signal on A4 and a constant 0.23V on A2 this is what I get: As you can see, it looks like some of the sinusoidal signal is being labeled as A2 and some of the DC is being labeled as A4. It would be much easier to debug what was going on if I could just read the channel_out signal with the conversion on EOS, but for whatever reason it always reads zero when I connect a wire to channel_out. Is there anything else I have to configure to get this to work correctly? Thanks, Chris xadc_wiz_0.v
  6. I am using zybo and block design flow to connect xadc ip to my system. But, the xadc is not giving out any info acquired from the outside. One forum mentioned that in case there is no instantiation xadc read internal voltage or temp. So I checked the wrapper and there is no instantiation of xadc. I am feeding the xadc with 100mhz clock. Should I change it? P. S; if I posted in the wrong forum please move my post. Thank you in advance for any help.
  7. Hello, I'm currently am trying to configure the XADC_wizard IP to receive audio from the mic_in port of the board. I have opened the XADC demo that was provided and saw in the Verilog code that the ports for the PMOD were instantiated. Leading to the ZYBO_Master.xdc I saw both the ##I2S Audio Codec and ## Audio Codec/external EEPROM IIC bus. Would either of these help me in setting up the mic_in port? Objective: receive external audio from the mic_in port, run it through the ADC, and view the data received and if possible view it in a waveform. Thank you
  8. Hello, I am using the latest version of XADC demo for Arty-Z7-10. In this demo, two switches should enable two XADC channels to be read from, however all of ADC channels (A0 to A11) are active together at the same time for different switch configurations which makes me think there is cross talk between these channels or XADC demo code is broken. Have anybody experienced this? I need to have three independent active ADC channels, while I have been able to use only one of them due to this cross talk issue. Best, Mahdi
  9. Hello! I have the following question. Is it possible to read Zynq temperature via XADC when working with Digilent Linux distro on PYNQ-Z1 board? Thanks!
  10. Hey, I want to use ZedBoard's XADC for sampling an external analog signal. Only one channel (single channel) is sufficient for now. Therefore, I tried to use the dedicated inputs, namely VP/VN in bipolar mode. When I check USERGUIDE480's page 32, the following picture is given: 1) From this figure, I understand that VN port must be supplied with an external 0.5 DC voltage source. Am I correct? Can i get this 0.5V dc from the ZedBoard not using an external supply source? 2) Is it enough I only connect VP/VN pins of XADC header leaving out other pins unconnected? I mean should I connect AGND or DGND to ground? thanks in advance, mehmet PS: Sorry, I posted this question to the incorrect sub-forum.
  11. When a custom bit files is used the petalinux fails. I am assuming the Petalinux build is expecting a PL XADC support? Is the a way to exclude this from the Petalinux build? Thanks Rick Linux version 4.9.0-xilinx-v2017.4 (setup@usrd23715) (gcc version 6.2.1 20161016 (Linaro GCC 6.2-2016.11) ) #1 SMP PREEMPT Thu Oct 11 15:36:08 EDT 2018 ........ usbcore: registered new interface driver usbhid usbhid: USB HID core driver Unhandled fault: imprecise external abort (0x406) at 0x000bc834 pgd = c0004000 [000bc834] *pgd=00000000 Internal error: Oops - BUG: 406 [#1] PREEMPT SMP ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.9.0-xilinx-v2017.4 #1 Hardware name: Xilinx Zynq Platform task: de44b640 task.stack: de44c000 PC is at xadc_axi_read_adc_reg+0x14/0x20 LR is at xadc_probe+0x430/0x6bc ....... [<c04e6eac>] (xadc_axi_read_adc_reg) from [<c04e8108>] (xadc_probe+0x430/0x6bc) [<c04e8108>] (xadc_probe) from [<c039dd38>] (platform_drv_probe+0x50/0x9c) [<c039dd38>] (platform_drv_probe) from [<c039c7d4>] (driver_probe_device+0x1b0/0x274) [<c039c7d4>] (driver_probe_device) from [<c039c914>] (__driver_attach+0x7c/0xa8) [<c039c914>] (__driver_attach) from [<c039b044>] (bus_for_each_dev+0x7c/0x8c) [<c039b044>] (bus_for_each_dev) from [<c039bf34>] (bus_add_driver+0x16c/0x1dc) [<c039bf34>] (bus_add_driver) from [<c039d030>] (driver_register+0xa0/0xe0) [<c039d030>] (driver_register) from [<c0101858>] (do_one_initcall+0x100/0x120) [<c0101858>] (do_one_initcall) from [<c0900da4>] (kernel_init_freeable+0x190/0x1d8) [<c0900da4>] (kernel_init_freeable) from [<c0603a98>] (kernel_init+0x8/0x10c) [<c0603a98>] (kernel_init) from [<c0106d18>] (ret_from_fork+0x14/0x3c)
  12. Is there a way to just input a voltage and read it through the terminal using the XADC Header on the Zynq 7000 Zedboard? If so can this be done using the VP VN pins?
  13. macellan

    XADC vhdl demo

    Hello I'm doing some trials on XADC reference design using ZYBO board and trying to understand how to configure it for another application. However the top level is in Verilog and so far I'm familiar with VHDL. Thus I've tried to convert the top level to VHDL but there is part shown below that I don't understand if it is automatically generated or included by the designer. I'm not familiar with this "dot" type coding and didn't do any similiar so far. If there is a VHDL version it will be very useful for me to understand the concept and also some explanation for the below part will be very nice. Thanks in advance! ============================================================================================= /////////////////////////////////////////////////////////////////// //XADC Instantiation ////////////////////////////////////////////////////////////////// xadc_wiz_0 XLXI_7 ( .daddr_in (Address_in), .dclk_in (clk), .den_in (enable & |sw), .di_in (0), .dwe_in (0), .busy_out (), .vauxp15 (xa_p[2]), .vauxn15 (xa_n[2]), .vauxp14 (xa_p[0]), .vauxn14 (xa_n[0]), .vauxp7 (xa_p[1]), .vauxn7 (xa_n[1]), .vauxp6 (xa_p[3]), .vauxn6 (xa_n[3]), .do_out (data), .vp_in (vp_in), .vn_in (vn_in), .eoc_out (enable), .channel_out (channel_out), .drdy_out (ready) ); =============================================================================================
  14. I am using XADC of Zybo board in DRP mode. I have connected the inputs of the XADC to a potentiometer supplying a voltage in between 0-1 V. I have used the PMOD pins to supply the output to external LEDs. But everytime the board is programmed, the LED outputs show a garbage value which is constant. Changing the potentiometer voltage does not change the outputs. Also resetting the XADC through GPIO buttons has no effect. Please help with the above issue.
  15. I have created a design in Vivado where I have used XADC with Zynq-7000 processor for acquiring a sine wave applied to the auxillary input of XADC. Now I have exported my hardware along with the bitstream file to the SDK. Now I want to create an application project in C/C++ for the corresponding design. I am facing problem in which header files to include and how to configure the code for proper implementation. Please help with the above issue.
  16. I am facing problem in how to use XADC wizard in Nexys 4 DDR board I just want to get the digital conversion of external inputs and access that 12bits of digital output directly. I am new to this and for now, I'm trying to just interlink XADC and a 12bits of DAC to convert an analog input(taken from a function generator) to digital(which will be stored in FPGA) and then use that digital data to generate the same signal at the output of a DAC. It will be really helpful If you can explain/provide a step by step process to do it. You can help using block design or a source code.... whichever way possible.
  17. Hi, I tried the example project named Nexys Video XADC Demo present at the resource center. Before programming the FPGA, the voltage values of AD1, AD0, AD8, and AD9 are very low (20mV) w.r.t the ground. If the FPGA is programmed, the voltage of AD1, AD0, AD8, and AD9 jumps to 0.4V, even without any input to them (ADC pins are kept open). Besides, after programming, if i provide 500mv unipolar sine signal to just AD1, the sine signal is appearing at other pins such as AD0, AD8, and AD9. I am not able to understand the reason behind the voltage jump and why the signal given at one ADC appears at others before and after programming the FPGA. Help is much appreciated. Regards, Subash
  18. Hi, I am trying to implement xadc on my Zybo Board. I created the hardware and exported it to SDK. Then, I build an application for reading the on-chip sensor. But when I run the application, it stucks at XSysMon_CfgInitialize function. On debugging, I found that it is enabling DataAbortInterrupt. Does anyone have an idea abou this? Please find attached my hardware design, code, address editor tab screenshot and the tutorial that I followed to do it. Thanks & regards Vishav xadc_code.txt lab3.pdf
  19. Dear All, For the first time im trying to get the XMOD working with the PS side and print the values in a terminal. I tried a bunch of tutorials like the microzed chronicles.. I ended up using the tutorial posted as attachment, as attechments I also included my sourcecode and block design. I tried debugging by making several prints and I know the code works untll at least the "Test2" printf. During the build, no errors or anything appear. So i'm a bit confused into finding out where it all goed wrong. xadc.pdf design_1.pdf lab3.pdf
  20. good day to all, my question is this: I am using the XADC of the Nexys 4 DDR, using the single channel mode, I want to sample at 1000 KSPS but using the IP CORE XADC Wizard it tells me that with these features the current conversion rate decreases to 961540 KSPS, I have searched the documentation of the XADC but I can not find a concrete answer to why this happens. If someone could help me, I would appreciate it.
  21. Hello, I was earlier able to flash LEDs on the Zybo 7010 board following the tutorials. However, I am currently trying to use the Zybo 7010 to flash LEDs which are external to the board. What I am looking at here is getting a constant voltage supply from one of the ports (maybe preferably the Xadc) to power the external LED circuit. I am having trouble getting a block design using the xadc_wiz_0 ip and the axi gpio with the zynq 7000 processor. Any information on this is greatly appreciated.
  22. I tried to build the XADC example project using Arty-Z7-20-xadc-2016.4-2.zip , https://reference.digilentinc.com/learn/programmable-logic/tutorials/arty-z7-xadc-demo/start , and https://reference.digilentinc.com/learn/programmable-logic/tutorials/github-demos/start . Using Vivado 2016.4, after entering the tcl command "source ./create_project.tcl" I get ...# update_ip_catalog -rebuild INFO: [IP_Flow 19-234] Refreshing IP repositories WARNING: [IP_Flow 19-2406] Cannot identify part xc7a200tsbg484-1 ERROR: [IP_Flow 19-2232] Current project options are not valid, cannot get 'PROJECT_PARAM.PART' WARNING: [IP_Flow 19-2406] Cannot identify part xc7a15ticsg324-1L ERROR: [IP_Flow 19-2232] Current project options are not valid, cannot get 'PROJECT_PARAM.PART' (etc.) Using Vivado 2017.4, I get a lot farther. I clicked Generate Bitstream. While launching implementation run, I got a critical warning: [IP_Flow 19-4739] Writing uncustomized BOM file 'c:/Users/janko/Xilinx/Arty-Z7-20-xadc/src/ip/xadc_wiz_0/xadc_wiz_0.xml' The build subsequently failed. I found an answer (AR# 69645) on the Xilinx site related to the IP_Flow 19-4739 warning, but it wasn't helpful. There is indeed a file C:\Users\janko\Xilinx6\Arty-Z7-20-xadc\src\ip\xadc_wiz_0\xadc_wiz_0.xci (and nothing else) in that directory, but removing that file (as the AR suggests) doesn't help. How can I build this example project?
  23. Hi, I am attempting to read a single-ended analog signal on one of ports A0 through A5 using the XADC in the Arty, but I am unable to connect the proper pins in a Vivado block diagram. Either the bitstream fails, or the C code never reads anything. I have a microblaze design that uses the AXI4 interface to the ADC, but still drives the temperature in the MIG and I followed one person's set-up of the XADC mentioned here, in order to still drive the temperature for the MIG7. I used this guide to do it: http://adiuvoengineering.com/?p=711 I have read everything I could on the matter in the Arty reference manual, but it doesn't mention how to tie these pins in Vivado in the block diagram: https://reference.digilentinc.com/reference/programmable-logic/arty/reference-manual Some things I have tried: I have enabled the Channel Sequencer in the XADC wizard and checked likely channels (like Vaux0, etc.). Doing a 'make external' on these new ports always fails implementation with issues related to improper IOSTANDARD on the bank of ports Manually hooking up the input pins by creating ports, hooking them to the XADC ports (like Vaux0), and using XDC constraints fail to implement with similar errors If I don't do 'make external' on any ports but the Vp_Vn one, then the bitstream generates, but the C code does not read any auxiliary channels. I have properly enabled all of them in the code and I loop through every channel to see what it registers. Temperature shows up just fine Is there a way to properly read the analog pins A0-A5 through the Vivado block diagram? Thanks!
  24. Hello, I am using the microblaze system with the xadc on an Arty board. I'm able to successfully read the internal voltages and temperatures of the chip, and I made some external pins (such as the VP/VN and Vauxp0 and Vauxn0). The pins which are external have been connected in a constraints file. My power supply positive terminal is hooked into the A0 port on my arty board, and the negative terminal is hooked into a gnd port. The XADC is attached to the AXI lite bus, controlled by the microblaze. Please let me know if any of this is unclear. P.S. I've looked into the spec sheets but am still a beginner so I'm not always successful finding the right information. Greatly appreciate the help! Nystflame
  25. Hi all, again, I have a doubt and I hope I can help, I am working with the xadc of the nexys 4 DDR and I already manage to send the data of the xadc by uart to a graphic inetrfaz in matlab, the xadc owns 4 differential channels of entrance , when I want to see the data of one of the 4 channels I change the DADDR address (DADDR_IN [6: 0]), in the instanziacion of the xadc, which implies that it only allows me to see the data of only one channel at a time, my question is: is it possible to see two or more channels at the same time in real time? thanks