Search the Community
Showing results for tags 'xadc implimentation issues.'.
Found 3 results
Hi, I have a ZEDBOARD which I want to interface it to an analog input signal and see the sinusoidal output. i'm following lab 3 tutorial by Adam Taylor. So, as for the first step, I tried to connect the signal generator to Vn and Vp. I expected to see the sinusoidal shape of the voltage in XADC dashboard (XADC wizard demo). and also set the ENABLE_ALL_AUXILIARY_CHANNELS check mark, which will include Vp/Vn. I set the function generator to frq 50Hz and amplitude 400-600 vpp, or DC also I applied and checked the signal on the dashboard and serial oscilloscope both. But, the board produces no reaction and the Vp_Vn channel still gives an uneven sine wave or i guess its noise or something else. I tried so many times but still i'm stuck at this point . Could anyone suggest any solution or PoW ?
Hello, I am kind of new to FPGAs and I am trying to use the XADC in order to monitor the temperature sensor: I am using Vivado 2018.2, Nexys video as a board. I used the IP catalog in order to set up the XADC as following: DRP, Single channel, continuous, disable all alarms, disable reset_in, channel to monitor: temperature I wrote a top level module which reads the bits 4 up to 7 from do_out and light up LEDs accordingly: //part of the top module: module top( input CLK100MHZ, input vp_in, input vn_in, input [1:0] sw, output reg [11:0] LED ); wire enable; wire ready; wire [15:0] data; reg [6:0] Address_in; xadc_wiz_0 XLXI_7 (.daddr_in(Address_in), //addresses can be found in the artix 7 XADC user guide DRP register space .dclk_in(CLK100MHZ), .den_in(enable), .di_in(0), .dwe_in(0), .busy_out(), .vn_in(vn_in), .vp_in(vp_in), .alarm_out(), .do_out(data), .eoc_out(enable), .channel_out(), .drdy_out(ready)); always @( posedge(CLK100MHZ)) begin if(ready == 1'b1) begin case (data[7:4]) 4'b0001: LED <= 12'b000000000001; 4'b0: LED <= 12'b0; 4'b1000: LED<=12'b000000000010; default: LED <= 12'b1; endcase end end ///// I have one problem though, as I come to set the address of the ddr_in as done in a documentation found here which has LEDs displaying potential differences monitored by XADC, I do not understand what 8 bit address I should assign for the DRP to monitor the Temperature Channel ! "Address_in <= 8'h ????" My goal: I need the LEds to display something for the sake of demonstration that I am able to read values out of the do_out. Thank you for your help.
Dear sir, i am shubham dwivedi , i have done a lot of work on ARTY board for implementing XADC ( 16 bit) but i am not able to get correct output (samples) , of my real time input waveform like SIN ,COS, TRIANGLE, RAMP signals , these i am giving by function generator . here also i am getting some kind of samples but it is not looking good .....when i have checked it with FFT (fourier transfourms) it is not recovering well......so i want to know is it possible to implement ADC on this board or another way is there to implement this, i am using 1 Msps sampling frequency. input signal i am giving less than 400 kHz. please sir reply fast , i am struggling very much ....on this things.