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Found 6 results

  1. When will the Microblaze Base System Design Tutorial be updated? I've tried following the one for the NEXYS4 board but the MIG for the DDR3 on the ARTY is not quite the same as the one for the NEXYS4. There is an extra reference clock on the MIG block and the the resets pins are routed to the processor reset block instead of the MIG reset block. Thanks
  2. Muthupriya Somasundaram posted this question on the Getting started with Vivado and Basys3 video: Hi, I registered in the digilentic forum, but i couldn't able to post any question. I am using a temperature sensor to measure the environment temperature and connected the sensor output to XADC. Now,form which pin do i need to get the binary output and the output will be in how many bits? Thanks in advance! Regards, Priya
  3. I am a teacher for Project Lead the Way and my course is Digital Electronics. In the course we use the CMOD S6 for about half of the course. Typically we use a program called Multisim to create circuits in what is know as PLD mode (Programmable Logic Device) and we export those programs via USB to the CMOD S6 that is attached to a specialty breadboard that can provide power, buttons, switches, etc. My issue is that I cannot find any documentation about what each of the 48 pins can be used for. We are told 24 and 25 are power and ground and we should use PIO14 to hook up an external clock b
  4. Here's a game of tic tac toe in VHDL for the Nexys4 DDR, written as a set of finite state machines and not as a computer running a program. The design is inspired from John F. Wakerly's tic tac toe code from his book "Digital Design: Principles and Practices", but I've completely rewritten it. The game logic is contained in the files TTTdefs.vhd, TwoInARow.vhd and game_logic.vhd. The rest of the code is there to interface with the user: to print strings to the user, to get digits and to control when moves are made. There are also two UART driver components. You should be able to set this up as
  5. HI, I got my Nexys4 DDR about 3 weeks back, and I've been able to bring up my own microcoded CPU on the board. Lots of fun! I borrowed the UART transmit code from one of the examples in the Resource Center. Is there an example with UART receive code in it, or does anybody have a simple 9600,8,N,1 UART receive component which would work? Many thanks, Warren
  6. Hi everyone ! I need some help please : when I try to implement a counter in active HDL I have this warning message : " Route:455 - CLK Net:U1/q<23> may have excessive skew because 2 CLK pins and 1 NON_CLK pins failed to route using a CLK template " I explain : Firstly I have designed a basic counter with Basys2 board : library IEEE; use IEEE.STD_LOGIC_1164.all; use IEEE.STD_LOGIC_unsigned.all; entity counter_2 is generic (N : integer := 4); port( clr : in STD_LOGIC; clk : in STD_LOGIC; q : out STD_LOGIC_VECTOR(N-1 downto 0) ); end counter_2; --}} End of au