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Showing results for tags 'vivado 2018.2'.
Hi, I am trying to implement Audio Demo on Zybo Z7 using this: https://reference.digilentinc.com/learn/programmable-logic/tutorials/zybo-z7-dma-audio-demo/start First, I wanted to do it just using Vivado 2018.2 (without SDK). I followed what is described in this comment: Bitstream is succesfully generated with two following warnings: [Labtools 27-3361] The debug hub core was not detected. Resolution: 1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active. 2. Make sure the BSCAN_SWITCH_USER_MASK device property in Vivado