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Found 6 results

  1. Hi, Where can I find a tutorial to run 'Hello World' with Vivado 2020.1 and Vitis to run on Nexys A7-100T ? I've searched everywhere, including this forum, and couldn't find a tutorial. I tried a tutorial on YouTube for the Artix 7, and I'm unable to generate a bitstream. I get this critical warning: [Vivado 12-1411] Cannot set LOC property of ports, Cannot set PACKAGE_PIN property of ports, port reset_0 can not be placed on PACKAGE_PIN C12 because the PACKAGE_PIN is occupied by port reset. Please note that for projects targeting board parts, user LOC constraints cann
  2. Hi im beginner on vivado, i have some troubles to interface the pmod wifi on zybo board. have you any tutorial how to do that on zybo board ?? thanks for your response
  3. Hello I tried HelloWorld example in Vitis and Vivado 2019.2 and this worked well until programming FPGA. Because I have only one USB cable to connect into zedboard PROG port or UART port, I ran a HelloWorld program with "RunAs -> Launch on Hardware(System Project Debug)" with connecting cable to PROG port and reconnected to UART port to receive outputs from zedboard. However, I got weird results(e.g. there is no outputs or there is outputs but garbled). After that, I borrowed a cable from my friend and also connected it to zedboard, and I rerun program and got appropria
  4. Hi, I asked this on the Xilinx forums too, but so far no one has answered. Maybe someone here can help. I bought a arty-7z-20, so I could learn more about FPGA's. I downloaded Vitis+Vivado 2020.1, and followed some tutorials (for example this one but they all have the same basic steps. The Vivado side is clear, I can generate a bitstream and export it to a board. I can also create the HDL wrapper, and export the xsa file. But now when I open Vitis, I should create a new platform project,
  5. Hello, I have a NetFPGA 1G-CML board and in my new project I will have to use Vitis Accelered Libraries. So, I would like to know if I can use Vitis Accelerated Libraries on a NetFPGA 1G-CML board. If I can't use it on NetFPGA 1G-CML, what would be the best board option? Thank you
  6. i get the message, "Vitis launch failed" when select Tools > Launch Vitas. I'm assuming that Vitas is a substitute for SDK. I've tried everything: Uninstalled / Re-installed Vivado 2019.2.1 Started a new project from scratch Looked for solutions in Xilinx and Digilent Forums I'm trying to run through the tutorial: Section 6.3 fails: File > Launch SDK does not appear in the pull down menu I'm running the tutorial on the Nexys A7 100T No solutions can be found. Questi