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Showing results for tags 'video processing'.
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Hello to all, i have start working on video processing through zybo board,so for that i have gone to digilent zybo video workshop file, its link is provided below http://web-pcm.cnfm.fr/wp-content/uploads/2017/04/Workbook-Digilent_ZYBO_Video_Workshop.pdf i gone through all steps carefully make all connection as shown in file but still nothing show Changes i have done in ip clocking wizard ip : sys_clock take 125mhz freq and set to mmcm at 200 mhz output dvi2rgb1v_7 ip : preferred resolution 1280*720 and other option as guided in file and other ip changes as provided in file Regarding error: their is no error or any critical warning is shown in vivado 2016.2 version bur still nothing shows,even though i have provided external power supply 5v to it and change jumper to its specific part edge detetion works fine and show rover output so i imported it in design and the complete design image i add in attachment.( i have twice check the hdmi cable ,vga projector and lp output all works fine) i have attach xdc file and desing image i m using zybo board having specific xc7z010clg400-1 part pls provide some solution or any other help ASAP Zybo_B.xdc
Hello, I am doing project on Video Processing. I have installed Linaro on Zybo usnig SD card. I want to use both PL and PS for video processing such that my OS will take the video from camera using USB or HDMI and my PL side will do further processing. Now I am having doubt regarding how I will send the video stream from OS side to PL side for further processing.The one thing I now is that I have to use AXI interface but don't now how to process further.
Hi FPGA gurus ! I'm trying to achieve video processing with Atlys board. My goal is to real-time rotate some VGA Stream ([email protected]) form hdmi input to 720p hdmi output. Rotation is 90° clockwise. The attached picture sketches what i'm aiming at. I've been thinking of using HDMI Demo project for this. I am a total noob to all this FPGA thing, i'm slowy trying to learn but it's not that simple when you don't know anything about electronics =) From what I have understood, in the HDMI demo the frame in written to DDR2 memory with a single call to the VFBC. TMDS data is pushed in the FIFO and when a new frame is detected, then the Write Command is emitted and stores the whole frame to memory. I thouht a good design for my project would be to store line by line, configuring the VFBC command with X=1, Y=639 and BaseAdress = [(40*lineStride)+(1160-lineCnt)] * 2. This way : line 1 (blue) is stored in the frame buffer as a 1 pixel wide column starting at pixel (1159,40) line 2 (green) is stored in the frame buffer as a 1 pixel wide column starting at pixel (1158,40) ... line 640 (orange) is stored in the frame buffer as a 1 pixel wide column starting at pixel (680,40) My understanding of the HDMI Demo is that modifying user_logic.vhd in hdmi_in is all i have to do, so that instead of writing the whole frame in one vfbc command, the frame should be written line by line with 640 VFBC commands, one for each line, with constant width = 1, constant height = 639 and baseAdress computed as shown above. Is this correct ? Any Suggestion, hint, advice or help will be highly appreciated as I quite lost with this !! Cheers
Hi guys, Actually this is my first post in this forum, could you please provide me with some guidlines of how to implement HDMI controller on genesys board starting from the Atlys's one ? peace,