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  1. I am in the proposal process that utilizes the Eclypse Z7 along with the Zmod ADC 1410. We are hoping to utilize vetted code to configure the ADC and accept the sample data. We need to do some processing and interfacing to external components so we cannot use the provided bit file. I have looked over GitHub repository ( and couldn’t find any VHDL or Verilog files?
  2. Good Afternoon Sir/Madam, I am trying to display the internal temperature of my device on a four 7-segments anodes hexadecimally. In my attached archive, I have already instantiated the XADC. After going over the user manual of 7 Series FPGAs and Zynq-7000 SoC XADC, Here is what I already know: I am aware that the measured temperature value is in address 00h. I am aware that channels 4 to 0 need to be all zeros to measure the on chip temperature. I am aware that the first 64 access locations (DADDR[6:0] = 00h to 3Fh) of DRP are read only which contain the ADC measureme
  3. Hello everyone. I'm working on a project wtih my friend. To accomplish it, we need to get 12 bit data from microphone and observe the output on LEDs. We couldn't figure out what is wrong with the code...spi_master.vhd mic3_xdc.xdc mic3.vhd spi_master_cs.vhd
  4. Do you need a board to board data interface because you've run out of IO or need a high speed PC interface? Interested in learning about how to deal with multiple clock domains? Just want to learn VHDL or the HDL design source flow? Do you want to stream your Arty A7 with ADC PMOD samples to a PC but don't have a suitable interface? Keep reading... Here's a project to try out and study. Zygot revisits the differential PMOD to find a use for it. Is this a new Differential PMOD Challenge? There's only one way to find out.
  5. I think my question is general but i want to know how to initialize Pmod OledRGB using case when-statment i found some vhdl codes using this method but i cant understand it
  6. Totally new to all this. 73 year old grandpa, retired engineer, returning to grad school, microelectronics concentration. Lots of technology catch-up to do. So, starting with VHDL. I must self-teach VHDL and need my first FPGA. Can someone help me understand these 3 possible choices for someone in my position: (1) Basys MX3 PIC32MX, (2) Nexys A7-100T, (3) Zybo Z7. Don't want to buy anything too complex, but I have to get the basics with ability to grow. Many questions about compatibility, accessories, programming... Can you help me get started?
  7. Hello everyone, I’m a newbie on working on zedboard, and I want to use my Zedboard to communicate with Pmod MIC3 this time. I did a few researches about how to use the Pmod MIC3, and I think I found something useful in another post, link: I’m really appreciate and thanks for their help, but unfortunately I still have no idea of how to make my Pmod MIC3 to run with my Zedboard. I know Pmod MIC3 is using SPI communication protocol and I read what SPI is, link:
  8. MoGamaal

    Display Variables

    I want to know how to display variables on PmodOLEDRGB from Sensors via artix-7 kit in vhdl
  9. Hi! I bought a Nexys 4 board and a Pmod OLED 128x32 screen, on which I am going to implement the Snake game, by programming the FPGA in VHDL. The problem that I encountered, is that I don't know how to set a pixel on the screen. I can only assume that I have to make some changes in the memory that maps the screen, something related to the example that I have found on the Pmod OLED's reference page, under the Example projects section. The given example takes a group of pixels and sends a character (its ASCII code), using the alphabet_screen variable, which is a memory. My question is, how
  10. Hello, I new on Basys 3, and I need some examples for programming FPGA. In the resource center there are a lot of them, but the examples are written in verilog. I am using VHDL, so the questión is: Is there the same examples like the resource center written in VHDL?
  11. Hello! I have created some VHDL code (attached) to test if DA4 convertor works. The simulation reveals no problems with timing of SCLK, DATA and SYNC channels according to the AD5628 data sheet, however output of the eight out data pins of DA4 does not work. Basically I am trying to send the the data to JB PMOD. Command and address are tuned by the eight switches on the Nexys4. The used command is 0011 and the address is 1111 (is that correct, by the way?), but I have tried plenty of other commands. Still the problem persists — no out data from DA4. Please do not hesitate asking for add
  12. Hello everybody, I want to implement a dac example into my fpga board (MYD-C7Z015). My input will be 32 bit. First 4 bits are command bit which are C3=0, C2=0, C1=1, C0=1. Next 4 bits are Don't Care Bits. After Don't Care Bits, 12 Bits will be nothing(space). Then the rest 16 bits will be my data.In other words, I try to implement LTC-2601 to 32 bit input. Now I have an IP with one output port. This Slave Ip has 4 registers. Also I use Zynq-7000 Processing System IP. In each rising edge of Zynq 7000 Processing System IP's clock I look at one bit and assign that bit to my slave regist
  13. I'm trying to put my own verilog module into official nexys video hdmi demo, but vivado 2016.4 keeps telling me "missing design sources" and reports error for implementation. I did as Xilinx says, declared a VHDL component then used named association to instantiate, is it better to declare an entity? EDIT: Verilog module(originally a testbench for another project): module testoverlay_0( input wire rst_n, input wire clk, output reg[23:0] RGBOut, out
  14. Hello everyone I am a student in bachelors and I am working on a project combining Digital Image Processing and FPGA programming. The project consists of global image thresholding but should be done real-time by the FPGA and returning the output image back to PC/laptop. I have the Nexys Video board but I still haven't figured out how to "import" the images. Is it even possible to store data in the FPGA's buffer/RAM? If someone could help me with importing/exporting data I would be very grateful. My course in FPGA includes programming in VHDL instead of Verilog, so that's the one I
  15. I want to send 8 bit data from FPGA to PC, 9600 baudrate, 8 bit data, 1 start&stop bit, no parity. I did coded my Basys3 Fpga and connected to PC. By using Tera Term, wanted to see how it works out. But probably something big I'm missing out. I just wrote a transmitter code and somewhere I saw that some people used button&top modules too. Do I need them to see a 8-bit data's ASCII equivalent on my PC? How can I handle? library ieee; use ieee.std_logic_1164.all; entity rs232_omo is generic(clk_max:integer:=10400); --for baudrate port(
  16. How do I implement an external differential clock in VHDL for the CMOD S7? Vivado keeps on telling me to inset this flag in my constraint file: set_property CLOCK_DEDICATED_ROUTE FALSE However, I care about timing because it's an external clock signal. I'm using a clock dedicated route(Pmod pin are 2×6) as seen in this schematic.
  17. Hello everyone. Recently I bought the Pmod i2s2: stereo Audio Input and Output module. I got this working with the example project. As part of the exercise I even translated the I2S part from Verilog to VHDL, and it’s working great by tying the output AXIS directly to the input (without the volume control part). digilent pmod i2s2 code My own vhdl equivalent What I’m a bit confused about, and this may be my limited knowledge of FPGA’s, is that everything is handled on the rising edge of the clock. For example in the digilent pmod i2s2 code in line 135 and 136 the rx_data_l
  18. Hello, I have a PmodOLED connected to Nexys 3 board and so far I was able to display ASCII characters by using either the VHDL example code provided by Digilent or the code from Mr. Y.Borrnat from here. I would like to display bitmap graphics. Could you guide me a little? Is it possible to do that by altering one of the codes mentioned? PS: I found a video unfortunatelly without any comments, so I mean something like that or draw a chart perhaps. Thank you.
  19. Hello, I am trying to send a character to FPGA from PC hyper terminal , for eg : 's' to start other processes in FPGA like initiating generation of CCD signals and sampling ADC et al and a different ascii character to stop the processes. I am able to send a ASCII character from PC hyper terminal and receive binary value it on FPGA LED's however I'm unable to use this for control. Please find my top level code below. 'Start' signal is to be controlling the initiation of other processes. library IEEE; use IEEE.STD_LOGIC_1164.ALL; use IEEE.NUMERIC_STD.ALL; Library UNISIM; u
  20. Hi, I want to use the DD to test an ASIC which needs quite some complicated digital control. First the ASIC needs to be initialized with several SPI commands. Once the device is configured a test sequence (4 digital control lines) will trigger the ASIC and thereby acquire measurement data. At last this data need to read out. I was wondering, if I could use the patterns which are generated by our (VHDL) simulator as input to the DD. Is there a script which can read the vcd-files and Importes them to WaveForms? As I am quite new to this field, I do not have any expierence with J
  21. Hello, I am trying to interface MCP3008 with basys 3 using SPI and store the values in a FIFO and transmit the values to PC using UART. Initially, I designed for ADC to convert input waveform and display results by increment or decrements of LED's. The MCP3008 ADC clock is 1.3 MHz clock. This works and led's increment as the amplitude of the input waveform is increased from signal generator . But when i receive through UART and plot on SerialPlot , the signal is distorted please find the code for ADC below: entity ADC is port ( -- command input clo
  22. Junior_jessy


    Hello, I'm trying to make a voice-activated on a nesys4 and i want to use the pmodMic3.To do si, I want to use the SPI protocol but i don't know how. So how can i choose the SPI protocol ? Furthermore, I got some issues when filling in the constraint's file. On the web-site of Diligent, the pin2 is not connected but, the protocol SPI show the opposite. So how to Well connect the in/out of the peripheral to the board in the constraint's file? Thank you in advance for your answer. Junior
  23. I am new in VHDL and have a school project. I am reading 40-bit data from DHT11 humidity sensor. Although first 8 bit is meaningful to me, I read all 40. At the end of the transaction, it is required to light 8 LEDs corresponding to each bit of 8bit. I can light the confirmation LED which lights when all 40-bit data is received. But, can’t do it for the data LEDs. I need urgent help. Thanks.
  24. I have connected an ov 7670 camera to my Basys 3 board and want to transmit the frame to a PC via the micro-usb port. I have tried UART serial communication, but the bit per second rate is simply not high enough to transmit a full 640 * 480 frame 15/30 times a second. I had the idea of implementing some sort of parallel communication, however I could not find any information or guides. I was wondering if anyone could help me out either with parallel communication, or suggesting a different method of transmitting frames to a PC. Thanks in advance.
  25. Hi, I have started using PMOD BLE recently and I can make a connection in between BLE and PC using a terminal (with Nexys4DDR making a direct connection in between). However, when I write a VHDL code, describing what I made on the terminal one by one, the BLE device stucks at rebooting. For both applications I use the following sequence that is described in "RN4871_user_guide.pdf" page 59 : - Send $$$ - Wait a second - Send SS,40<CR> (this is to select UART Transparent feature only) - Wait a second - Send R,1<CR> - Wait a second -