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Found 4 results

  1. Hello, dear FPGA enthusiasts! Currently, I have been working with my OV7670 camera and can present it on an HDMI screen. However, this was done without a simulation. What I want to do right now is to use a TPG provided from Xlinix in my design and remove the OV7670 fully. However, the problem is that I really don't know how to go next since I am using uB together with a VDMA and TPG. I know that you can include the ELF file from the uB in order to simulate your design together with uB. My question to you is where I can find C code for the TPG used in the nexys video board? Is there any guidelines or documents that provide information on how I have to set up my design before I simulate AXI4 peripherals. Do I need to create my own testbench or is there testbench's out there that are already done? Initially, I was using the ILA to test my peripherals but that is a very ineffective way of testing my models since it takes a lot of time and it is hectic to recompile when I make a small change. I have attached my block design. regards, John hdmi.pdf
  2. Greetings everyone, This is the first ever post of a beginner who has set on the path to learn embedded systems. Please forgive me if haven't followed rules of posting. I took the embedded system plunge few weeks back. Bought a strong laptop, a Zybo board, OV7670 camera, installed Vivado. Read online tutorials like 'blinking LEDs' and 'HDMI-to-VGA out' (and the others ones in Zynq Book) to get myself accustomed with Vivado etc. [Abbreviations in the text: PS= Processing System, PL= Programmable Logic] I have been visiting a blog lately and have found that quite helpful. A couple of weeks back I started this project mentioned on the same blog (http://lauri.võsandi.com/hdl/zynq/xilinx-vdma.html). What I'm doing is a bit simpler version of this as I omitted some part of the design which I thought wasn't required, I'll mention about that later. Pretty much like a mixture with another project involving test pattern generator (http://lauri.võsandi.com/hdl/zynq/xilinx-video-capture.html) My aim in this project is to get the stream from OV7670 camera, take it through PL (AXI VDMA IPs) to the PS, and then view the stream inside some window within Xillinux (linux). I feel doing so will ensure a bit of learning in both the PL and PS. Following is my progress along with doubts I have so far: 1- I have pasted the picture of my block design (called VDMA_Trial). After playing hit and trial, I managed to go around all the initial errors and successfully generated the bitstream. Which was a big relief. If you compare my block design with the one mentioned on the link I pasted above, you'll notice mine has lesser number of IP blocks. I did not need the RGB, HSYNC and VSYNC outputs from the PL so I omitted that part and only focused on taking the camera stream to the PS. Do you think this makes sense? Or do I need to have the complete IP blocks even if I don't wish to see the stream on HDMI (or VGA)? 2- I'm a normal computer user who has used Windows PCs most part of the life. So I don't have much idea of CLI based Linux. After reading from online resources, I booted Xillinux image (downloaded from xillybus.com) on the Zybo through SD card. Since I wish to watch the stream from the camera inside the GUI Xillinux. From a bit of reading I got to know about something called V4L2, which I'm still trying to figure how to install on Xillinux. Now assuming the design in point 1 is fine, can I simple paste the bitstream of the project in the SD card along with the Xillinux boot files (there are some other files in SD card too for Xillinux: devicetree, ulmage and xillydemo.bit). Will the hardware design in the PL activate and start writing the video stream information to the PS memory (DDR) when I boot up the Zybo with this SD card? If not, what step must I follow? Do I need to launch SDK to write some code to tell PS what to do? But I will already have the Xillinux OS running on PS, am I correct when I say I'll have to write and compile some code in Xillinux to tell PS to fetch the stream which is being written to PS memory by VDMA (from PL). 3- While reading different stuff, I came across this thing related to V4L2 and OV7670 (http://www.cs.fsu.edu/~baker/devices/lxr/source/2.6.31.13/linux/drivers/media/video/ov7670.c). To a layman like me, it looked like the code to set up OV7670 camera using V4L2 driver. Will I need to compile and run this code in Xillinux to watch the stream? I tried, but it just did not compile. My apologies for making it long and prob'ly silly. Just started traversing a steep learning curve, will take time to learn. I really look forward to seeing your enlightening responses. If there's any more info you need please let me know (in easy English ). Regards, Haris.
  3. Twoism

    Zybo base system design

    Hello, I've got some troubles while trying to fully understand the Zybo base system design. I need to replicate in my design (with Vivado 2015.4) the video part of the bsd, with the Axi display control ip. The design works but some points are not very clear to me: I've notice that 2 different clock sources are feed to the PL: (FCLK_CLK0 @ 100 MHz and FCLK_CLK1 @ 150 MHz). What is the reason behind this? Isn't 100 MHz enough for the VDMA? Why an Axi protocol converter is used? The design was build for an older version of Vivado (and ip library)? Thanks
  4. Hi all, I have a Zynq -7000 development board and am using Vivado 2014.4. I have a block design that successfully synthesizes and generates a bitstream. My design uses Xilinx's VDMA core, and I want to use the Xilinx's VDMA driver with it (http://www.wiki.xilinx.com/DMA+Drivers+-+Soft+IPs#AXI VDMA). The driver guide says "The device tree node for AXI VDMA will be automatically generated, if the core is configured in the HW design, using the Device Tree BSP." However, I am having trouble generating a device tree for the design. I have been referencing this http://www.wiki.xilinx.com/Build+Device+Tree+Blob and have gotten as far as generating a .dts file, but I'm having trouble understanding how to compile a .dtb from that. From what I understand, it seems that I need build a Linux kernal to use the device tree compiler? I have been building my project on a Windows 8 computer. Is there another way I can generate a .dtb file from the .dts file? Any help is appreciated Thanks, Chris