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Found 3 results

  1. Greetings all, I have gone through the xuartlite interrupt system example many times.But still I could not able to understand the process of the example. My task : 1. A process will be continuously running in a while loop, 2. If an interrupt ( a string "RING") in the receiver buffer of uartlite occurs, the first process should stop and the interrupt handling process should occur. 3. After the interrupt handling, the first process should continue. Anybody having any idea how to resolve this? Thank you in advance. PS: If there is any clear explanation about the xilinx provided uartlite interrupt example anywhere in the internet, please kindly provide the link. It would be really helpful
  2. Hi All, I'm start working with the AXI UART Lite in my Block Design with a Microblaze soft core. Actually I've the whole design working, using the xil_printf I'm able to send data out the board to the PC through the Virtual COM Port exposed by the board itself. The better approach involve the use of interrupts in order to manage the RX and TX operations. My first try was to found some documents about this point, found it into the yourdesign_bsp > BSP Documentation > uartlite_v3_2 folder: right click and select Open Documentation give the API list on the browser, the documentation reside locally on the following path (I'm using VIVADO 2016.1): C:/Xilinx/SDK/2016.1/data/embeddedsw/XilinxProcessorIPLib/drivers/uartlite_v3_2/doc/html/api/index.html Opening the: C:/Xilinx/SDK/2016.1/data/embeddedsw/XilinxProcessorIPLib/drivers/uartlite_v3_2 inside the examples there are several examples how to use interrupt with this peripheral, I took the xuartlite_intr_tapp_example.c file. Concerning this example I've some question to asking. Looking through the source code I see: #ifdef XPAR_INTC_0_DEVICE_ID #include "xintc.h" #include <stdio.h> #else #include "xscugic.h" #include "xil_printf.h" #endif First question is about this conditional statement. Starting from the SDK I've opened the xparameters.h file: scroll down until you reach the xparameters.h file. Double click on to open the file and make a search for the XPAR_INTC_0_DEVICE_ID label: This label should be the reference to the AXI Interrupt Controller present into the Block Design (system.pdf).with name microblaze_0_axi_intc. Now I need to know the exact difference between this two type of controller, the AXI is into the Fabric and I think is automatically managed from the Microblaze side by means of a dedicated software layer also the Generic Interrupt Controller I think is also managed by Microblaze but may be I've to configure it in order to instruct what peripheral have to use I'm correct? In this example I'm using the AXI Interrupt Controller so I can avoid to insert the whole code related the Generic Interrupt Controller, correct? Another question is if I'm using the AXI Interrupt Controller there are some reason to use also the Generic Interrupt Controller or I can't use it due to some constraints or other reasons? Someone can give me some explanation about this point? Thank!
  3. Trying to instantiate multiple UARTLite cores in a microblaze design using an Arty Board. For some reason, the output of both UARTLite modules is going through the same USB UART port as opposed to the second port I've configured. Any suggestions? [CONSTRAINTS] set_property IOSTANDARD LVCMOS33 [get_ports usb_uart_bc127_rxd] set_property IOSTANDARD LVCMOS33 [get_ports usb_uart_bc127_txd] set_property PACKAGE_PIN U11 [get_ports usb_uart_bc127_txd] set_property PACKAGE_PIN V16 [get_ports usb_uart_bc127_rxd] [SOURCE CODE] #include "xparameters.h" #include "xstatus.h" #include "xuartlite.h" #include "xil_printf.h" /************************** Constant Definitions *****************************/ #define UARTLITE_DEVICE_ID_0 XPAR_UARTLITE_0_DEVICE_ID #define UARTLITE_DEVICE_ID_1 XPAR_UARTLITE_1_DEVICE_ID #define TEST_BUFFER_SIZE 16 int UartLitePolledExample(u16 DeviceId); /************************** Variable Definitions *****************************/ XUartLite UartLite_0; /* Instance of the UartLite Device */ XUartLite UartLite_1; /* Instance of the UartLite Device */ /* * The following buffers are used in this example to send and receive data * with the UartLite. */ u8 SendBuffer[TEST_BUFFER_SIZE]; /* Buffer for Transmitting Data */ u8 RecvBuffer[TEST_BUFFER_SIZE]; /* Buffer for Receiving Data */ int main(void) { int Status; /* * Run the UartLite polled example, specify the Device ID that is * generated in xparameters.h */ Status = XUartLite_Initialize(&UartLite_0, UARTLITE_DEVICE_ID_0); if (Status != XST_SUCCESS) { return XST_FAILURE; } if (Status != XST_SUCCESS) { xil_printf("Uartlite polled Example Failed\r\n"); return XST_FAILURE; } Status = XUartLite_Initialize(&UartLite_1, UARTLITE_DEVICE_ID_1); if (Status != XST_SUCCESS) { return XST_FAILURE; } if (Status != XST_SUCCESS) { xil_printf("Uartlite polled Example Failed\r\n"); return XST_FAILURE; } xil_printf("Successfully ran Uartlite polled Example\r\n"); //XUartLite_Send(&UartLite_0, SendBuffer, TEST_BUFFER_SIZE); int temp = 80000; int simplecounter = 0; char links[] = "DIGILENT DIGILENT\n\0"; char linksx[] = "ARTY ARTY ARTY ARTY\n\0"; while (1) { if (1) { xil_printf("Cha Cha Cha.... %d\r\n", simplecounter++); XUartLite_Send(&UartLite_0, &links, TEST_BUFFER_SIZE); XUartLite_Send(&UartLite_1, &linksx, TEST_BUFFER_SIZE); temp = 80000; } } return XST_SUCCESS; } [XPARAMETERS] /* Definitions for peripheral AXI_UARTLITE_0 */ #define XPAR_AXI_UARTLITE_0_BASEADDR 0x40600000 #define XPAR_AXI_UARTLITE_0_HIGHADDR 0x4060FFFF #define XPAR_AXI_UARTLITE_0_DEVICE_ID 0 #define XPAR_AXI_UARTLITE_0_BAUDRATE 9600 #define XPAR_AXI_UARTLITE_0_USE_PARITY 0 #define XPAR_AXI_UARTLITE_0_ODD_PARITY 0 #define XPAR_AXI_UARTLITE_0_DATA_BITS 8 /* Definitions for peripheral AXI_UARTLITE_1 */ #define XPAR_AXI_UARTLITE_1_BASEADDR 0x40610000 #define XPAR_AXI_UARTLITE_1_HIGHADDR 0x4061FFFF #define XPAR_AXI_UARTLITE_1_DEVICE_ID 1 #define XPAR_AXI_UARTLITE_1_BAUDRATE 9600 #define XPAR_AXI_UARTLITE_1_USE_PARITY 0 #define XPAR_AXI_UARTLITE_1_ODD_PARITY 0 #define XPAR_AXI_UARTLITE_1_DATA_BITS 8 /******************************************************************/ /* Canonical definitions for peripheral AXI_UARTLITE_0 */ #define XPAR_UARTLITE_0_DEVICE_ID XPAR_AXI_UARTLITE_0_DEVICE_ID #define XPAR_UARTLITE_0_BASEADDR 0x40600000 #define XPAR_UARTLITE_0_HIGHADDR 0x4060FFFF #define XPAR_UARTLITE_0_BAUDRATE 9600 #define XPAR_UARTLITE_0_USE_PARITY 0 #define XPAR_UARTLITE_0_ODD_PARITY 0 #define XPAR_UARTLITE_0_DATA_BITS 8 /* Canonical definitions for peripheral AXI_UARTLITE_1 */ #define XPAR_UARTLITE_1_DEVICE_ID XPAR_AXI_UARTLITE_1_DEVICE_ID #define XPAR_UARTLITE_1_BASEADDR 0x40610000 #define XPAR_UARTLITE_1_HIGHADDR 0x4061FFFF #define XPAR_UARTLITE_1_BAUDRATE 9600 #define XPAR_UARTLITE_1_USE_PARITY 0 #define XPAR_UARTLITE_1_ODD_PARITY 0 #define XPAR_UARTLITE_1_DATA_BITS 8