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Showing results for tags 'uart0 and 1'.
I have UART1 enabled on MIO 48() 49(). I can't figure out where these pins are on the board. Please help me out in finding the relevant part from the documentation. Attached is the screenshot from schematic found at: - https://reference.digilentinc.com/_media/reference/programmable-logic/arty-z7/arty_z7_sch.pdf Any help is highly appreciated. Its my first post.
Hi, I have noticed an issue in a bare-metal application when polling the register XUARTPS_ISR (Channel Interrupt Status Register). No issues when I use XUART_SR (Channel Status Register) instead. The issue: When I poll XUART_ISR for TX_FULL and RX_EMPTY the UART interface becomes an unstable state. No sending and receiving after a few bytes is possible. Has somebody noticed the same issue or can somebody explain whats happening? Edit: My current code for the UART interface (Here I use XUARTPS_SR instead. But when I poll XUARTPS_ISR
Greetings all, I am new to zedboard. This might be a basic question. I want to send some data via UART0 to DDR memory through direct memory access AXI. (GPS data) Again I want to collect another set of data from UART1 and writing it to DDR memory.(GSM/LTE module) Now if interrupt from one UART( UART1) occurs, I want the processed data of UART0 which is on the DDR memory to be read via UART1(GSM module) and send to a remote server. Any suggestions and advice on how can i design the hardware?