Search the Community

Showing results for tags 'synopsys'.



More search options

  • Search By Tags

    Type tags separated by commas.
  • Search By Author

Content Type


Forums

  • News
    • New Users Introduction
    • Announcements
  • Digilent Technical Forums
    • FPGA
    • Digilent Microcontroller Boards
    • Non-Digilent Microcontrollers
    • Add-on Boards
    • Scopes & Instruments
    • LabVIEW
    • FRC
    • Other
  • General Discussion
    • Project Vault
    • Learn
    • Suggestions & Feedback
    • Buy, Sell, Trade
    • Sales Questions
    • Off Topic
    • Educators
    • Technical Based Off-Topic Discussions

Find results in...

Find results that contain...


Date Created

  • Start

    End


Last Updated

  • Start

    End


Filter by number of...

Joined

  • Start

    End


Group


AIM


MSN


Website URL


ICQ


Yahoo


Jabber


Skype


Location


Interests

Found 1 result

  1. Hi, I use JTAG HS2 with Synopsys Metaware for ARC debugging. I can download the information successfully. However, the speed is very slow. The download speed is about 1KB/s. I checked the protocol with logic analyzer and found the root cause is that the gap between IR and DR is about 1ms. One DWORD takes IR-DR-IR-DR. Was the gap caused by HS2 HW, driver or software? Thanks!