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Found 70 results

  1. Hi all, I'm having trouble getting a spi module set to 'slave mode' to read data. I'm working with the Arty Board and attached is my Vivado block diagram. The SPI module that I'm having trouble with is 'axi_quad_spi_0'. I've set the IP to be in standard and unchecked Master Mode in the SPI Options. I set the FIFO to 256 and Freq Ratio 16x30. I have a master device (zybo board) sending spi to these pins which I can monitor on a logic analyzer; however when reading the read reg corresponding to 'axi_quad_spi_0', I see nothing. The other registers of axi_quad_spi_0 read as follows: Reg 0x60 => 0x18a Reg 0x64 => 0x25 Reg 0x70 => 0x01 whether or not the master device is sending SPI. The output from these registers seem sort of reasonable, but I would hope the flag in reg 0x64 bit 5 to go to 0 in the case axi_quad_spi_0 clks spi data in, but it isn't, which is consistent with readreg 0x6C returning 0x00. I also tried connecting outputs of a master spi module to another slave spi module 'axi_quad_spi_2' and got the same result (see block diagram). I've also tried, the xilinx spi polled mode examples and can't seem to get those working either. See below for some relevant SDK code. Can someone tell me what I might be doing wrong? Is there something more fundamental that I don't understand? Thanks! Best, Mike #define spi_dev_id2 XPAR_SPI_2_BASEADDR void simple_receive() { int data; XSpi_WriteReg(spi_dev_id2,0x60,0x1EA); XSpi_WriteReg(spi_dev_id2,0x70,0x1); XSpi_WriteReg(spi_dev_id2,0x28,0x80); data = XSpi_ReadReg(spi_dev_id2,0x6C); printf("Lithe Buffer Simple %#02x\r\n",data); }
  2. Hi there, I am in need of help communicating with my Pmod AD5 using the SPI on raspberry pi 3. I am pretty new to SPI and have troubleshooted and searched the web for solutions over the past week but have yet to solve this problem. Here are some of the steps that I have done: 1) managed to read values using the Arduino Library linked on the product page and with an Arduino UNO, by connecting VCC of Pmod AD5 to 5V (I am not sure what I cannot read anything when connected to 3.3V) 2) understood what SPI is about and what the Arduino Library is doing (or what I think was logical) - read through the whole AD7193 datasheet to understand the registers etc.. 3) extracted the outputs (Binary/hexa format) that the Arduino was sending to the Pmod AD5, understood them, and attempted to use them in raspberry pi with the spidev library but with no progress .. 4) tested by raspberry pi's SPI (they are enabled) using the same spidev library and successfully communicated and got values from a simpler ADC: mcp3008 using this 5) checked the wiring to ensure everything is intact and correctly connected For my application, I intend to read ADC values up at speeds up to 1kHz over 2 channels and hence have chosen this Pmod AD5. For testing wise, I have connected a potential divider across A1 and A2 on the AD5 and am able to read the voltage changes when using Arduino but not in raspberry pi 3. Here's my python code using the spidev on raspberry pi 3 (have connected to CE0): ####################### START OF CODE ################ import spidev import time spi = spidev.SpiDev(),0) spi.max_speed_hz = 50000 spi.mode=0b00 resp = spi.xfer2([0xFF, 0xFF, 0xFF, 0xFF, 0xFF]) print('Resetting...', resp) time.sleep(0.5) ##resp = spi.xfer2([0x08, 0x18, 0x00, 0x60]) ##print('Enable DAT_STA Bit', resp) ##time.sleep(0.5) resp = spi.xfer2([0x10, 0x00, 0x01, 0x10]) print('Set PGA Gain = 1, Buffer = 1', resp) time.sleep(0.5) ##resp = spi.xfer2([0x08, 0x18, 0x00, 0x64]) ##print('Setting filter rate select bits to 100', resp) ##time.sleep(0.5) ## ##resp = spi.xfer2([0x08, 0x98, 0x00, 0x64]) ##print('Initiate internal calibration, starting w zero-scale', resp) ##time.sleep(0.5) ## ##resp = spi.xfer2([0x08, 0xB8, 0x00, 0x64]) ##print('Full-scale calibration...', resp) ##time.sleep(0.5) while True: #choose channel resp = spi.xfer2([0x10, 0x00, 0x01, 0x00]) resp = spi.xfer2([0x58, 0x00, 0x00, 0x00]) time.sleep(0.1) print('data:', resp) ####################### END OF CODE ################ Here's what most of my output looks like when I run the code (kind of the same code regardless of whether I have or not have anything connected in A1/A2 - it is unreactive even when I connect my potential divider and change the potential): Resetting... [254, 170, 128, 193, 255] Set PGA Gain = 1, Buffer = 1 [0, 0, 0, 0] data: [0, 0, 0, 0] data: [0, 0, 0, 0] data: [0, 40, 128, 0] data: [0, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 232, 191, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 232, 191, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 232, 191, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 232, 191, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 255, 255, 255] data: [255, 232, 191, 255] data: [255, 255, 255, 255] etc... etc... This was the code I used to successfully read from the simpler MCP3008 ADC: ####MCP3008 ## adcnum = 0 #### r = spi.xfer2([1, (8+adcnum)<<4,0]) ## r = spi.xfer2([1, 0x80, 0]) ## print(r) #### result = ((r[1]&3) << 😎 +r[2] #### print(result) ## time.sleep(0.1) For more clarity, this is the Arduino code that I was using and got working with UNO: /************************************************************************ * * Test of the Pmod * ************************************************************************* * Description: Pmod_AD5 * The result of the A / D conversion of the AIN1 channel is displayed on the serial monitor. * * * Material * 1. Arduino Uno * 2. Pmod AD5 (do not touch the jumper and * dowload library * ************************************************************************/ #include <SPI.h> // Call of libraries #include <AD7193.h> AD7193 AD7193; // Creation of the object AD7193 unsigned long valeur; float tension; void setup() { Serial.begin(9600); // initialization of serial communication Init_AD7193(); } void loop() { valeur = AD7193.ReadADCChannel(0); // conversion A/N on input 1 valeur = valeur >> 8; // Extraction of value tension = AD7193.DataToVoltage(valeur); // Recovery of tension Serial.println(""); Serial.print("Valeur="); Serial.print(valeur); Serial.print('\t'); // tabulation Serial.print("Tension="); Serial.print(tension); Serial.println("V"); } // Initialisation du module Pmod AD5 void Init_AD7193(void) { AD7193.begin(); // initialization of Pmod AD5 module AD7193.AppendStatusValuetoData(); // configuration of Pmod AD5 module AD7193.SetPGAGain(1); AD7193.SetAveraging(100); AD7193.Calibrate(); AD7193.ReadRegisterMap(); } Would highly appreciate if anyone can help to give me tips on how to proceed or whether I am doing or understanding anything wrongly. Thank you very much.
  3. I need to spy on an SPI connection for a long period of time which will require timestamps on the data to find approximate times of transmission. As this is not possible in Waveforms (which is a real shame) has anyone written any software that uses the SDK to do something similar to this? It would save me a bit a work if there was already an existing solution. - Callum
  4. I'm using the Analog Discovery 2 and on WaveForms 3.8.2 I cannot figure out how to send and receive SPI data. I can read SPI traffic fine through the Logic Analyzer, but I've had no luck with the Protocol analyzer. I have some hardware that I'm debugging that sends commands to a SPI device. The Logic Analyzer tool shows this just fine (below). What I'd like to do is send other SPI commands using the Protocol tab but I've had no luck figuring out how to send commands (properly). As a first step, I'd like to reproduce what I see below in the logic analyzer but do it instead in the protocol tab. As you can see, I just get 0xFFs back in the Protocol window, whereas I'd expect to get 0xD7 0x24 0x12 0x04... Any ideas? I have never been able to get the Protocol tab to work in SPI mode. Has anyone else?
  5. Hello everyone, I am looking for an ADC and a DAC of at least 2 MSPs and a resolution greater than or equal to 12 bits. I do not want to use ADC or DAC with an FMC type interface (I do not have enough free pins on my FPGA card). A serial type interface (SPI) would be nice. Are there PMODs that have these characteristics? If not, can you recommend an ADC / DAC with these characteristics (> 2 MSPs and> 12 bit resolutions)? I have to process signals of frequency <= 10 kHz and send them to a DAC with a resolution of at least 12 bits and an acquisition speed of at least 2 MSPs. Thank you! Regards H
  6. Hello, I tried posting this on the Xilinx forums but got no response. These forums look more active and friendly so hopefully somebody can help me. I am really stuck. I am trying to follow along with the "How To Store Your SDK Project in SPI Flash" tutorial (, but I cannot get it to work. I am using an Artix-7 35T Arty FPGA Evaluation Kit. I am running Vivado v2017.2 (64-bit) and SDK v2017.2 on a Windows 10 machine. First, I created a simple "Hello World" program by following the steps in the "Arty - Getting Started With Microblaze" tutorial ( The only deviation from the instructions that I made was that after adding the MIG to the board, I added an AXI Quad SPI, with enabled port SPI_0, and then ran "Run Connection Automation". When I ran my C program on the Arty board it worked fine, and printed "Hello World" to my PuTTY terminal. I've attached my board file as both .bd and .png. Second, I tried store this "Hello World" program to the Arty's SPI Flash using the "How To Store Your SKD Project in SPI Flash" tutorial. But, it did not work. I'll walk you through what I did because there are a few things that I am confused about. Unless otherwise noted I followed the instructions exactly. Before step 0: I don't know what the QSpi mode jumper setting is referring to, so I didn't do anything. Step 1.3: I compressed my bitstream so I left FLASH_IMAGE_BASEADDR as 0xF8000000, like I found it. Steps 2.1 and 2.2: I used my "Hello World" app that I created by following the "Arty - Getting Started with Microblaze" tutorial. I couldn't place the sections into mig_7series_0 because that wasn't an option, so instead I used mig_7series_0_memaddr. Step 4.1: I used offset 0xF8000000 because that is what I used in Step 1.3. One other thing: the test says to use Arty flash type mt25ql128-spi-x1_x2_x4 (which I do), but the image of the "Program Flash Memory" window shows them using Arty flash type n25ql128-spi-x1_x2_x4. Step 5: it doesn't work. Does anyone have any suggestions? Is the SPI Flash some sort of external hardware that I need to plug into the Arty? Thanks in advance.
  7. Analog Discovery is a nice tool to use to emulate MASTER SPI and debug. I have some students who are trying to use it to emulate a SPI Master Device to interface to a peripheral resolver chip from Analog Devices before they implement the design in an FPGA. The Analog Devices chip has !WR/!FRAME sync signal in addition to the the main SPI. Is there any easy way for them to use the SPI protocal MASTER mode (using the setup on the SPI MASTER tab) at the same time with generating a pattern signal for !WR/!FRAME that is in sync with SCLK? If so, how could they reference the frame signal to the SCLK signal from the protocol? I know the SPI protocol takes control of the pattern generator, but I am not sure how to explain to students to use both modes of operation (SPI Master Mode setup alongside a separate signal sync'd to SPI)? Attached is the Analog Devices SPI timing diagram we are trying to emulate.
  8. I have been following this tutorial and have had no luck. I am uncertain about how to configure the QSPI IP, because the tutorial starts assuming that I have done that part successfully, so I am not even sure if this is the root of my problem. I have tried these two configurations of this IP, compiled them, and exported them to the SDK, and none of them solved the problem: I made sure JP4 is in the QSPI position. On step 3.1 in the tutorial, I can see that the FPGA is programmed successfully and I see the following output (since I chose not comment out the VERBOSE define as suggested in the tutorial): While programming the flash on step 4 I notice that my FPGA code is erased from the board (leds I had assigned to outputs turn off). Is that supposed to happen? At the end of the tutorial I get no "hello world" output on the terminal after resetting the board, though the FPGA does seem to program from the flash successfully, so that portion works, but I can't get the C-code to run from the flash. Here is the sdk_console_output.txt so you can see the steps I took in the sdk to program the board.
  9. I need to generate test data for evaluating I2C, SPI and CAN devices (only one test at a time, so multiple simultaneous patterns are not necessary). I've tried to get the Analog Discovery 2 to do that and it doesn't look like it will. I've looked at the Digital Discovery and it's not clear that it can do that either. I'm hoping I don't need a US$600+ device. Any recommendations would be appreciated. Thanks
  10. Hello, I am trying to interface MCP3008 with basys 3 using SPI and store the values in a FIFO and transmit the values to PC using UART. Initially, I designed for ADC to convert input waveform and display results by increment or decrements of LED's. The MCP3008 ADC clock is 1.3 MHz clock. This works and led's increment as the amplitude of the input waveform is increased from signal generator . But when i receive through UART and plot on SerialPlot , the signal is distorted please find the code for ADC below: entity ADC is port ( -- command input clock : in std_logic; -- 100MHz onboard oscillator trigger : in std_logic; -- assert to sample ADC diffn : in std_logic; -- single/differential inputs channel : in std_logic_vector(2 downto 0); -- channel to sample -- data output Dout : out std_logic_vector(14 downto 0); -- data from ADC OutVal : out std_logic; -- pulsed when data sampled -- ADC connection adc_miso : in std_logic; -- ADC SPI MISO adc_mosi : out std_logic; -- ADC SPI MOSI adc_cs : out std_logic; -- ADC SPI CHIP SELECT adc_clk : out std_logic -- ADC SPI CLOCK ); end ADC; architecture behavioural ofADC is -- clock signal adc_clock : std_logic := '0'; -- command signal trigger_flag : std_logic := '0'; signal sgl_diff_reg : std_logic; signal channel_reg : std_logic_vector(2 downto 0) := (others => '0'); signal done : std_logic := '0'; signal done_prev : std_logic := '0'; -- output registers signal val : std_logic := '0'; signal D : std_logic_vector(9 downto 0) := (others => '0'); -- state control signal state : std_logic := '0'; signal spi_count : unsigned(4 downto 0) := (others => '0'); signal Q : std_logic_vector(9 downto 0) := (others => '0'); begin -- clock divider -- input clock: 100Mhz --100MHz/1.3MHz = 74/2 -- adc clock: 1.3MHz clock_divider : process(clock) variable cnt : integer := 0; begin if rising_edge(clock) then cnt := cnt + 1; if cnt = 37 then cnt := 0; adc_clock <= not adc_clock; end if; end if; end process; -- produce trigger flag trigger_cdc : process(adc_clock) begin if rising_edge(adc_clock) then if trigger = '1' and state = '0' then sgl_diff_reg <= diffn; channel_reg <= channel; trigger_flag <= '1'; elsif state = '1' then trigger_flag <= '0'; end if; end if; end process; adc_clk <= adc_clock; adc_cs <= not state; -- SPI state machine (falling edge) adc_sm : process(adc_clock) begin if adc_clock'event and adc_clock = '0' then if state = '0' then done <= '0'; if trigger_flag = '1' then state <= '1'; else state <= '0'; end if; else if spi_count = "10000" then spi_count <= (others => '0'); state <= '0'; done <= '1'; else spi_count <= spi_count + 1; state <= '1'; end if; end if; end if; end process; -- Register sample outreg : process(adc_clock) begin if rising_edge(adc_clock) then done_prev <= done; if done_prev = '0' and done = '1' then D <= Q; Val <= '1'; else Val <= '0'; end if; end if; end process; -- LED outputs PROCESS (adc_clock) BEGIN IF (adc_clock'EVENT AND adc_clock = '1') THEN CASE D(9 DOWNTO 6) IS WHEN "0001" => Dout <= "000000000000011"; WHEN "0010" => Dout <= "000000000000111"; WHEN "0011" => Dout<= "000000000001111"; WHEN "0100" => Dout <= "000000000011111"; WHEN "0101" => Dout <= "000000000111111"; WHEN "0110" => Dout <= "000000001111111"; WHEN "0111" => Dout <= "000000011111111"; WHEN "1000" => Dout <= "000000111111111"; WHEN "1001" => Dout <= "000001111111111"; WHEN "1010" => Dout <= "000011111111111"; WHEN "1011" => Dout <= "000111111111111"; WHEN "1100" => Dout <= "001111111111111"; WHEN "1101" => Dout <= "011111111111111"; WHEN "1110" => Dout <= "111111111111111"; WHEN "1111" => Dout <= "111111111111111"; WHEN OTHERS => Dout <= "000000000000001"; END CASE; END IF; -- END IF; END PROCESS; OutVal <= Val; -- MISO shift register (rising edge) shift_in : process(adc_clock) begin if adc_clock'event and adc_clock = '1' then if state = '1' then Q(0) <= adc_miso; Q(9 downto 1) <= Q(8 downto 0); end if; end if; end process; -- Decode MOSI output shift_out : process(state, spi_count, sgl_diff_reg, channel_reg) begin if state = '1' then case spi_count is when "00000" => adc_mosi <= '1'; -- start bit when "00001" => adc_mosi <= sgl_diff_reg; when "00010" => adc_mosi <= channel_reg(2); when "00011" => adc_mosi <= channel_reg(1); when "00100" => adc_mosi <= channel_reg(0); when others => adc_mosi <= '0'; end case; else adc_mosi <= '0'; end if; end process; end behavioural; --much of the code is of credit to micronova electronics. For fifo, I use the Xilinx IP fifo generator with no FWFT working on 100Mhz clock both on write and read sides. FIFO width = 10 Depth = 2046 and tried increasing upto 131072 with no progress. This is my top level code with UART entity top_module is Generic ( PARITY_BIT : string := "none" -- type of parity ); port( clk, rst,trigger,diffn: in std_logic; adc_mosi,adc_clk,adc_cs : out std_logic; adc_miso : in std_logic; channel : in std_logic_vector ( 2 downto 0); wr_uart,uart_clk_en : in std_logic; WriteEn , ReadEn : in std_logic; full, empty : out std_logic; --w_data: in std_logic_vector(7 downto 0); Dout : inout std_logic_vector(9 downto 0); busy : out std_logic; tx,OutVal: out std_logic ); end top_module; architecture structural of top_module is signal fifo_data_out : STD_LOGIC_VECTOR (9 downto 0); component fifo is port ( reset_rtl_0 : in STD_LOGIC; clk_100MHz : in STD_LOGIC; full_0 : out STD_LOGIC; din_0 : in STD_LOGIC_VECTOR ( 9 downto 0 ); wr_en_0 : in STD_LOGIC; empty_0 : out STD_LOGIC; dout_0 : out STD_LOGIC_VECTOR ( 9 downto 0 ); rd_en_0 : in STD_LOGIC ); end component fifo; begin MercuryADC : entity work.ADC port map ( clock => clk, trigger => trigger, diffn => diffn, channel => channel, -- data output Dout => Dout, OutVal => Outval, -- ADC connection adc_miso => adc_miso, adc_mosi => adc_mosi, adc_cs => adc_cs, adc_clk =>adc_clk ); fifo_i: component fifo port map ( clk_100MHz => clk, din_0(9 downto 0) => Dout(9 downto 0), dout_0(9 downto 0) => fifo_data_out(9 downto 0), empty_0 => empty, full_0 => full, rd_en_0 => ReadEn, reset_rtl_0 => rst, wr_en_0 => WriteEn ); uart_trx : entity work.UART_TX Port map ( CLK => clk, -- system clock RST => rst, -- high active synchronous reset -- UART INTERFACE UART_CLK_EN => uart_clk_en, -- oversampling (16x) UART clock enable UART_TXD => tx, -- serial transmit data -- USER DATA INPUT INTERFACE DATA_IN =>fifo_data_out (9 downto 2) , -- input data DATA_SEND => wr_uart,-- when DATA_SEND = 1, input data are valid and will be transmit BUSY => busy -- when BUSY = 1, transmitter is busy and you must not set DATA_SEND to 1 ); end structural; PFA the schematic of my design and waveform as well. input is 650 hz and Vpp= 1.5V; continuous sine wave. My output waveform appears to be distorted. I'm not sure if there has to be a delay incorporated while sampling the input signal or a is the issue between FIFO and UART. When WriteEn signal is asserted on FIFO, the full flag is asserted at the same instant, does that mean the size of FIFO is not enough. Kindly help, any inputs will be appreciated. MCP3008(3).pdf
  11. Hello, I am new to ZYBO board. I am working on a project where I want to control a sensor from my ZYBO board using UART and receive the data from the sensor via SPI. I searched for the reference design, tutorials online to get started with, but I could not find any. Can anyone point me in the right direction where I can refer to and implement my work? THANK YOU. This is my aim as shown below. I want Zybo to be the main host, not my PC.
  12. Hello, i am having trouble using the chipkit uc32 together with the analog shield here : When i connect the Shield to my Arduino UNO one samples needs about 10 microseconds witch should be right. Instead if i connect it to the chipKit uc32 it takes about a 150 microseconds. I guess the SPI communication is not working properly but i dont know why. Since i dont know wether the board is the retired version or the newest i thought it might not work if its the old one. Did anybody else have a similar problem or is there a way to find out wether my uc32 is the old or new revision. Thx in advance Edit: I solved the problem. Instead of using the Arduino IDE i switched to MPIDE. Now it works with a sample rate of 1sample / 25 microseconds. There might be a problem with the Additional Board Manager URL for the Arduino IDE. I might take a look at it if i have the time.
  13. Hello, I am trying to get x,y,z axis data from the accelerometer adxl345 using linx in labview. I have managed to do that with I2C protocol, but I want to do it also with SPI protocol in order to achieve greater sampling rate. I have read the adxl345 datasheet but I struggle figuring out to which exact registers I must write so that I can read the datax,y,z registers. I attach my -so far now working- program below, thank you in advance.
  14. Hy, guys, I am using the PmodCLS, and although it is retired now (October 2018), my project is ongoing with 4 of them, using an adapted VHDL demo code from resource center. I am in need of using one 20x4 LCD module instead of the 16x2 I have there. As a first innocent try, I just connected in parallel the 20x4 pins with the 16x2 pins. The 16x2 continue to work, but the 20x4 shows only squares...(contrast and backlight connections are ok). In the demo lookup file it does not seems to have a configuration command for the LCD. Is PmodCLS automatically configured for 16x2? How could I use a 20x4 LCD on PmodCLS? Does anyone have the information about the instructions set of PmodCLS that could be used on a 20x4 LCD? Thanks for your help, Guacamoleroger
  15. Greetings, Is there a toolkit, etc. for use with the AD2 and Labview for I2C or SPI? I would like to monitor and simulate if possible. I have download and looked at both the Waveforms toolkit and AD2 toolkit, but did not immediately see this functionality. I'm guessing no such bundled library exits. Thank you Cheers, JMA
  16. Hi ! I am interested in using the Digital Discovery controlling multiple devices at the same time with different protocols. E.g. I would like to setup the UART on the digital discovery on DIO 28 as TX and 29 as RX while using SPI at the same time on the default setup DIOs as 24/CS, 25/CLK, 26/DQ0/MOSI, 27/DQ1/MISO. Using then I2C on e.g. 31/SCL and 30/SDA and CAN on 36/RX and 37/TX on top of that would be very nice as well. Is this possible from the user interface (which I would prefer) or do I need to create custom code for that?
  17. Hi all, I am working on SPI transceiver with AD2 in master mode. I am using python sample codes provided. transmitting is working fine but in receiving i am able to get the signals on wire but not to the variable in python rgwRX = (c_uint16*1)() while True: dwf.FDwfDigitalSpiSelect(hdwf, c_int(4), c_int(0)) dwf.FDwfDigitalSpiRead16(hdwf, c_int(2), c_int(24),rgwRX, c_int(len(rgwRX))) dwf.FDwfDigitalSpiSelect(hdwf, c_int(4), c_int(1)) print rgwRX[0] I am getting only '0's corresponding signal while receiving tapped on CRO is attached and it is proper but when i try it using Waveforms software it works but i see same signal on wire
  18. Hello, Does PmodSD ( support SD mode of operation? Is it designed only to work with SPI mode as written in the reference manual? Please let me know Regards, Vinay Shenoy
  19. Victor McKeighan


    I'm using Xilinx ISE suite to design, test and program the Cmod S6 board. At this point I am able to configure the Spartan6 FPGA with a bit file over the USB connection (although I have not verified functionality), but I'm having a problem programming the serial PROM. Here is the report I get from the iMPACT tool: INFO:iMPACT - Current time: 5 Jul 2018 14:00:55 // *** BATCH CMD : Program -p 1 -dataWidth 1 -spionly -e -v -loadfpga PROGRESS_START - Starting Operation. Maximum TCK operating frequency for this device chain: 25000000. Validating chain... Boundary-scan chain validated successfully. '1': IDCODE is 'ffffff' (in hex). '1': ID Check failed. INFO:iMPACT:2488 - The operation did not complete successfully. INFO:iMPACT - SPI Device not found. INFO:iMPACT:2488 - The operation did not complete successfully. INFO:iMPACT - '1': Flash was not programmed successfully. PROGRESS_END - End Operation. Elapsed time = 4 sec. It seems to fail the ID Check, whatever that is. When I selected the PROM device, I chose S25FL128S from the available list. I think that is the correct one. Also, if I try to erase the PROM or do anything else with it, I get a similar error. I tried following instructions posted on this forum, but nothing seems to work.
  20. Hi all, I am working with zybo zync 7010. i am trying to build spi slave using quad spi using sdk example program. but the data is not received. program hangs on at while (TransferInProgress==TRUE) and will never come out of the loop. please help me out.
  21. Trillian

    Bistream Size Quad SPI

    Hi there, I'm trying to program the arty using quad spi and I get the following error: [Writecfgmem 68-4] Bitstream at address 0x00000000 has size 2192012 bytes which cannot fit in memory of size 2097152 bytes. So I'm ~95kb short. Now I wonder what I can try to make my Bitstream smaller. Would I just try to shrink my cpp application?
  22. I desperately want to connect three devices to a Raspberry Pi3 that has a single Pmod HAT Adapter fitted to it. The devices are all SPI types: Pmod AD1 Pmod ISNS20 Pmod TC1 I can only run 2x devices since ports JA(A) and JB(A) both support SPI, but JC(A) does not. Is stacking of Pmod HAT Adapters allowed or can I connect an SPI device directly to the open GPIO pins? I would greatly appreciate any advice! Even if NOPE is an answer...
  23. Hello, I am trying to use the pmod DA4 with my Arty S750 board. I'm aware that Digilent does not offer an IP for interacting with the Pmod, so I took it upon myself to design one. Anyways, things seemed to be going well until I actually tested the DA4. I know that the DA4 uses SPI to communicate, so I programmed the IP to communicate that way, and it does (outputs from the pmod connector correctly seen on an oscilloscope), but every time I connect it to the DAC I can't get much of anything to come out of the channels. I've read through the AD5628 reference manual, but a few things were ambiguous to me. First the commands on table 9. I don't really understand the difference between writing to the register (command 0) and writing to the DAC channel (command 3), and which I should be using for my project. And second, I plan on using an internal voltage, and it says that setting up the internal voltage is the first step. As I have it now, it's the first thing my program does and I'm afraid that the DAC is unable to read this input (maybe I should add a brief delay? I saw a brief delay in the "simon says" code). I know it's been a long post, but any answers or insights on the DA4 or any other part of my post is much appreciated. Thanks, Gill
  24. I'm having trouble getting the SPI1 port working as a slave on the Cmod board. It works fine as a master talking to an Arduino Mini Pro configured as a slave, but not vise versa. I verified that the Arduino Mini configured as a master is working, but I never receive anything in the SPI1BUF on the Cmod. I have tried setting SPI1CON to 0x8000 and 0x8080, but neither worked. Does anyone have sample code that works as a spi slave?
  25. Hi all, I'm having an issue with the FPGA SPI interface I programmed onto my microzed. The issue is that the interface cannot read the data sent back from my slave device! I'm using a SAMA5d3-xplained devboard, and an oscilloscope to measure signals. I made the SAMA return the same buffer it received, only with every byte shifted. So it's a semi-loopback routine. The oscilloscope captures both the correct signal back from the SAMA (every byte divided by 2), AND the signal going into it (out of the MicroZed). However, the spidev_test.c (that seemingly famous SPI testing utility on the torvalds repository ( program that I'm using shows one of two things: 1. Either the result is always an error of "SPI transfer timed out" 2. or the value in rx is the same as in tx. That is, even though the SAMA slave is demonstrably (via oscilloscope) returning something else, all the RX buffer gets is the same as was sent via the TX buffer. In fact, I can even disconnect the header that plugs the master to the slave, and this behavior becomes no different. The difference between these two results is simply a matter of removing the 1050th line in drivers/spi/spi.c when building the kernel. It's the call to wait_for_completion_timeout() in the function static int spi_transfer_one_message(struct spi_controller *ctlr, struct spi_message *msg). What I get from this is basically that the spi-xilinx.c driver does not know where to look for the output from the slave (MISO), and it either waits eternally for that output (if the call to wait_for_completion is left intact) OR it doesn't care to look for the data and just fills the rx buffer with the tx buffer. Now I have a very limited understanding of hardware and driver programming, so I'm basically like a blind man in the dark here. I'm adding printk() statements to spi-xilinx.c and spi.c everywhere, and checking their results with dmesg and there's just nothing enlightening (I'm using PetaLinux, and the devices all show up correctly in /dev and /sys). I'm hoping someone more experienced can shine a light on what I'm doing wrong here, or at least point me in the right direction. Attached is my device tree file, plus a screenshot of the hardware design. (the relevant node in the DT is highlighted below) amba_pl { #address-cells = <0x1>; #size-cells = <0x1>; compatible = "simple-bus"; ranges; axi_quad_spi@41e00000 { bits-per-word = <0x8>; compatible = "xlnx,xps-spi-2.00.a"; clock-names = "axi_clk", "spi_clk"; clocks = <0x1 0xf>, <0x1 0xf>; fifo-size = <0x10>; interrupt-parent = <0x4>; interrupts = <0x0 0x1d 0x1>; num-cs = <0x1>; reg = <0x41e00000 0x10000>; xlnx,num-ss-bits = <0x1>; xlnx,spi-mode = <0x0>; spidev@0 { compatible = "spidev"; reg = <0x0>; spi-max-frequency = <0x17d7840>; }; }; }; goodVersion1.dts