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Found 4 results

  1. Hello everyone, So I own a Basys 2 board with spartan 3E FPGA and I am using ISE Design Suite 14.5. I want to create a VGA output with 800x600 resolution and 40Mhz clock so it will have 60Hz refresh rate. I am writing the code in verilog. I have entered exact numbers for horizontal counter, vertical counter, hsync and vsync that are required for operation stated above. However, I am unable to output the VGA signal. I am using two DCMs that can be generated in the ISE design suite, I am using first DCM to multiply 50MHz clk to 100Mhz and then I am using second DCM to divide 100Mh
  2. Hi All, Its been a while in setting up Compilers and Synthesizers. No problem setting up the Spartan 3E 1600 it was on the list in ISE 14.7. However, the SpartanĀ®-3 FPGA Starter Kit board has a four-character, seven segments LED display controlled by Spartan 3 FPGA is not on the list. What would it take to build up a library or configuration in ISE 14.7 . to select this Spartan 3 Board. Characteristics the compiler needs Chip and Package number as well as the Temp Code, maybe. Most importantly it needs to know where Jtag is and how it's connected. RAM and ROM chips and addresses g
  3. Here is a promised project demonstrating how to use an FPGA board to configure the FPGA on an S3 Starter Board. It's a nice demo and features the UART_DEBUGGER ( corrected version... ) using a FIFO to print signal states that change at a much higher rate than the UART can keep up with. S3_PROGRAMMER_R1.zip
  4. Hello. I picked up this Spartan-3AN development board to follow along this good book: "FPGA Prototyping by VHDL Examples", Xilinx Spartan -3 Version, by Phong P. Chu. The book appears to be published by Wiley-Interscience. It's a very good book to learn VHDL with. Dr. Chu recommended using ISE version 8.2 and Modelsim XE III. I tried using the latest ISE version (14.7), but it kept crashing. What I would like to ask is, can you recommend a tool-chain that is still available, and is compatible with the Spartan 3 series boards? I am able to synthesize a project using ISE 8.2, but I c