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Found 90 results

  1. Hi, I want to read analog data from ad1 pmod. For Vivado part, I use digilent pmod ips to connet fpga. For SDK part, I use AD1.h and AD1.c library in examples. My sensor sends to me analog values between 0-3.3V. (This is a heart rate ECG values). During using arduino, all heart beat data can be read. But I use same function for zedboard, Analog values doesnt look like arduino's. How I can configure and fix this problem? As you see ad1-zedboard connection as below.
  2. hey there I am a beginner to zynq. I have bought a zybo board. I am using vivado version 2015.4. I followed the below link to add zybo board file to vivado: then I this tutorial: but it did not work. in this tutorial says: but when I select Hello world demo, I see the below attached image. it says that could you please tell me what I should do? thanks in advance.
  3. Hello, I am having troubles setting a constant voltage level for a tristate digital out pin on the Digital Discovery using the SDK. I can easily set a constant voltage level for a push-pull configuration using the below code, but this does not work when the OutType is set to tristate. dwf.FDwfDigitalOutTypeSet(hdwf, c_int(1), c_int(0)) dwf.FDwfDigitalOutCounterInitSet(hdwf, c_int(1), c_int(0), c_int(0)) dwf.FDwfDigitalOutCounterSet(hdwf, c_int(1), c_int(0), c_int(0)) Any suggestion on how to implement this for the tristate case?
  4. Hello, I have recently purchased Zedboard along with Pmods AD1 and DA4. I want to implement Gradient Descent algorithm in the Zedboard using these Pmods with bandwidth more than 100 kHz. To get started, I tried to regenerate a analog signal using the Pmods AD1 and DA4. The experiment is completely explained with block design and output plots in the ADC_DAC_1_compressed.pdf. The SDK C code for acquistion and generation (adc_dac.c) as well as for finding max. working speed of DAC (dac_maxv.c) are atttached. The ADC clk is set to 20 MHz and DAC clk is to 50 MHz. It could be observed from the ADC_DAC_1_compressed.pdf that the maximum speed (frequency) the DAC (DA4) can write is only 33 kHz. The desirable acquisition and generation rate should be more than 200 kHz for my case. I identified that, the Xspi transfer written in the code (adc_dac.c) sends only 8 bits out of 32 bits of the DAC per clock cycle. Can we directly write all the 32 bits of the DAC in a single clk cycle using SDK ?? or is there any other way to make the ADC and DAC work faster?? What am I missing?? Looking forward to you suggestions and other similar references. Thanks in advance
  5. Hello I'm using PYNQ-Z1 board. I am trying to receive CAN traffic with PmodCAN on the board. Here is my Block Design. Then, Generate Bitstream was successful. (But some warnings appeared and the messages are like Generate_Bitstream_messagex.png) I did Export Hardwear and Launch SDK. When I created the Hello world project in SDK and compiled it, there was no problem. However, as soon as I executed Program FPGA, the following error message appeared. How can I fix this error? ---------------------------------------------------------------------------------------------------------------------------- bitstream is not compatible with the target Program FPGA failed bitstream is not compatible with the target ---------------------------------------------------------------------------------------------------------------------------- By the way, the PmodCAN wiki page says that it is necessary to send SPI commands to set up PmodCAN. Do I have to do this setup when sending and receiving CAN messages on the PYNQ board?
  6. Hi, I want to use Nexys4 ddr board to read sdcard, reference this topic and read @jpeyron answer, but after I create the block design with Pmod_SDcard ip and generate bitstream and launch Vivado18.2 SDK tool, an error for new Application Project occur, it may relate to this PmodSD IP, but I an new for using SDK tools. Can you help me how to deal with this error? Thank you! design_1_wrapper.hdf
  7. Dear All, "I'm working with Vivado 2018.3 and a Zybo Z7020 board" I write here because I have a very strange problem in a project that I have been developing in the past months. Namely, I've been writing a verilog code to run on a Z7020 board. This code takes user input as parameters (that are hence hard-coded) and everything works fine with this project (no errors or not understandable warnings...) Now, my job is to make sure that these so-colled parameters can be changed through a serial connection from a laptop. Hence, I've packaged my module in an IP and connected it to the PS, programmed the SDK and here is the problem : Many things work but some don't. At the beginning, I thought that the SDK used a different convention to represent signed integers (two complement, only first bit changed...) and have thereby checked that the parameters sent by the SDK where equal to hard coded values in the PL... and they are! Every single bit.. I'm now out of option to understand my problem... Has anyone had similar issues in the passt? Does anyone have a clue for me? Thank you a lot, P.S. : Please do not hesitate to write a comment if you need any further infos.
  8. sgandhi

    Webserver using Zybo Z7

    Hello, I have been successful in running the lwIP echo server on the Zybo Z7 board. However, I want to develop a web server on Zynq. I have gone through the lwIP documentation. However, in the discussion of this topic, I was successful in reading the .bin file from the SD card. Now I want to set up a web server on Zynq so I can command the server to read the .bin file from SD card and store it in the DDR. How do I start working on the web server. I have been searching a lot for the tutorial or anything that could make me understand in a simpler way but I failed to find any.! I also tried understanding the echo server C code in sdk however, after a point it seems too confusing to me. I could even think of modifying the echo server C code to develop a web server with some help, may be. The documentation of lwIP is confusing to me at this point.... Thanks, Shyama.
  9. Hello Digilent Forums, I have an Analog Discovery 2 + Impedance Analyzer board, and have been programmatically manipulating the board via the DWF library. I am now trying to plot Input Phase (∠) programmatically. The SDK for Python comes with a ``, which houses values of `c_int()`, corresponding with various measurement types. For example, `DwfAnalogImpedanceImpedance` measurement type corresponds to `c_int(0)`. I do not see a constant for Input Phase inside ``. Is it possible to get Input Phase? Thank you in advance for your help!
  10. Hi, I'm trying to use the UART of my Analog Discovery 2 in python. I've had a look at the example and just ran it. At first, I thought it worked. But then I realized it was okay only for the first frame. After increasing the sleeping before the print (see the pics just under), the values are more often correct, but there's still a lot of unexpected results. (see the pics just under ). The thing is, when I use Waveforms, it works(see the pic just under). Also I thought of a problem with the SDK, even if I don't really think so. Could someone help me? Thanks, Marc
  11. YakirP

    Pmod wifi SDK problem

    Hi i'm using Vivado 2018.2 + Zedboard, my goal is to use the WiFiScan from the examples attached to Pmod WiFi folder. i have build the project in vivado section and exported it to SDK at that point i'm creating new application project, choose C++ project and select finish. i'm getting the following errors: flexible array member 'DHCPDG_T::options' not at end of 'struct DHCPMEM_T' DHCP.h ‪/proj_bsp/ps7_cortexa9_0/include/DEIPcK/utility‬ line 216 C/C++ Problem flexible array member 'DHCPDG_T::options' not at end of 'struct DHCPMEM_T' DHCP.h ‪/proj_bsp/ps7_cortexa9_0/libsrc/PmodWIFI_v1_0/src/DEIPcK/utility‬ line 216 C/C++ Problem flexible array member 'SMGR_T::rgPages' not at end of 'class TCPSocket' HeapMgr.h ‪/proj_bsp/ps7_cortexa9_0/include/DEIPcK/utility‬ line 145 C/C++ Problem flexible array member 'SMGR_T::rgPages' not at end of 'class TCPSocket' HeapMgr.h ‪/proj_bsp/ps7_cortexa9_0/libsrc/PmodWIFI_v1_0/src/DEIPcK/utility‬ line 145 C/C++ Problem flexible array member 'SMGR_T::rgPages' not at end of 'class UDPSocket' HeapMgr.h ‪/proj_bsp/ps7_cortexa9_0/include/DEIPcK/utility‬ line 145 C/C++ Problem flexible array member 'SMGR_T::rgPages' not at end of 'class UDPSocket' HeapMgr.h ‪/proj_bsp/ps7_cortexa9_0/libsrc/PmodWIFI_v1_0/src/DEIPcK/utility‬ line 145 C/C++ Problem flexible array member 'SMGR_T::rgPages' not at end of 'struct DNSMEM_T' HeapMgr.h ‪/proj_bsp/ps7_cortexa9_0/include/DEIPcK/utility‬ line 145 C/C++ Problem flexible array member 'SMGR_T::rgPages' not at end of 'struct DNSMEM_T' HeapMgr.h ‪/proj_bsp/ps7_cortexa9_0/libsrc/PmodWIFI_v1_0/src/DEIPcK/utility‬ line 145 C/C++ Problem thanks for the help
  12. Esti.A

    OpenCV and Pcam5-c

    Hi everyone, I am working in teh demo that was created by Digilent to get images from teh Pcam5-c that is connected by a MIPI CSI-2 interface to teh zybo z7-020 board. In this case, I was wondering if I decide to do the processing of the image (edge detection, enhancement of light,...) I would need to use SDx. I have seen that there are plenty of solutions in OpenCv but I dont know how the hardware proyect and the SDx project can be linked. Note, in this initial design I have teh initiallization od teh camara and platform in a C++ application file that I dont know how if I should export to sdx file and how does this interact with the platform. Anothr queation I have is that for interacting with the openCv set-up do I must use Linux ? Kind regards Esti
  13. Hello, I am a college student currently working on the HDMI Input demo for the Zybo board on Vivado 2018.3 and SDK. I am following the steps provided on this forum, but I end up with trouble displaying the HDMI source onto the monitor. Without any modification, I can get the HDMI source to display properly; however, there seems to be many errors and warnings. In addition, modifying the C code by commenting out some of the switch statements resulted in no change whatsoever. After creating a new bsp and application project, followed by copy and pasting all of the source files, I had no errors popping up. I was able to see the results of the modifications I made, but the HDMI source wouldn't display onto the monitor (just the DemoPrintTest shows up). I have posted my project onto this link. If possible, I would like to get help on this matter.
  14. Kris Persyn

    Stuck in SDK

    Hi, I'm stuck in SDK. I want to control my hardware design through the use of IP cores, but can't seem to get my software to run properly. I cant even xil_printf nor light some LEDs on my Zybo z20. Any suggestions? head.h helloworld.c
  15. Hello, I am using Vivado 2018.2 i downloaded "Zybo-Z7-20-Pcam-5C-2018.2-*.zip" demo project in original project "part" option is choosen then I created a new vivado project i choose "board" option and i created same block design with "Zybo-Z7-20-Pcam-5C-2018.2-*.zip" demo project. I inserted same IP blocks and made connections. I did synthesis and implementation succesfully but when i exported to SDK and i tried to boot from SD card (i used hello world template) i did not see anything on terminal but when i am trying to export original project to SDK not which i create, then i can see hello world message on Terminal. Why did i not see anything in my project but i saw in original demo project? what could possibly be the problem? Hoping to read from you soon Best regards
  16. I am kind of new on electronics. I am trying to set a trigger connection to analog discovery 2(AD2) from matlab. Since matlab has a supporting package of AD2 for data acquisition tool, I tried to set a trigger with the function addTriggerConnection() but i got the message You cannot use "addTriggerConnection" with Digilent hardware. Is there any other suggestions on how to trigger data Recording from matlab data acquisition tool for AD2.
  17. Hi, I get infinite loops when I enter a digit which is not expected from scanf function while programming a standalone application for the retired version of zybo. what I want is to enter just an integer. I used the next code to avoid entering something that is not an integer by accident, as an alternative for scanf. This works great on CodeBlocks, but when I try to use it on SDK it does not work, it's like I cannot enter anything. How can I solve this issue? should I use another function or library? #include <stdio.h> #include <stdlib.h> int main(void) { char *p, s[100]; int n; while(1) { while (fgets(s, sizeof(s), stdin)) { n = strtol(s, &p, 10); if (p == s || *p != '\n') { printf("Please enter an integer: "); } else break; printf("You entered: %d\n", n); } printf("the number is %d\n",n); } }
  18. Hi! I can't get the Python script to work properly. Environment that I've tried with: Windows 7 & 10 Python3 SDK 3.9.1 and 3.10.2 Digital Discovery and Analog Discovery 1 Just running the script as is, it seems to be working, but the triggering point is not correct. (When running DD I added FDwfDigitalInInputOrderSet to set fDioFirst=True) IMHO, this line seems not correct: if cSamples == 0 and (sts == DwfStateConfig or sts == DwfStatePrefill or sts == DwfStateArmed) : sts is declared as c_byte() and DwfState... as c_ubyte(), so they will never be equal. Adding .value will fix this: if cSamples == 0 and (sts.value == DwfStateConfig.value or sts.value == DwfStatePrefill.value or sts.value == DwfStateArmed.value) : Now the script will be hanging, as the unit remains in the prefill state. Changing -1 to 0 in dwf.FDwfDigitalInTriggerPrefillSet(hdwf, c_int(-1)), makes the unit to leave the prefill state, but the record is not started at the assumed trigger point. I'm not aware of the units internal design, but a level triggering can cause faulty triggering, so I changed to edge trigger, but it seems like I'm not able to have that work that way either. Some good ideas what I'm doing wrong? I would like to start a record from my triggering point. And what does prefill = -1 does? I can't find any info in the SDK manual. /Peo
  19. Hi @jpeyron, @D@n , @Mahdi I completed my block diagram design in Vivado, and I used Microblaze IP for AXI control, and PmodDA3 IP. (1st picture) But , I want to know how to assign Constraints to the JD Connector and what are source code that should be written in SDK ? I am using Arty 7. Kindly, see the attached pictures. Looking forward your help. Thanks .
  20. Hello, I tried posting this on the Xilinx forums but got no response. These forums look more active and friendly so hopefully somebody can help me. I am really stuck. I am trying to follow along with the "How To Store Your SDK Project in SPI Flash" tutorial (, but I cannot get it to work. I am using an Artix-7 35T Arty FPGA Evaluation Kit. I am running Vivado v2017.2 (64-bit) and SDK v2017.2 on a Windows 10 machine. First, I created a simple "Hello World" program by following the steps in the "Arty - Getting Started With Microblaze" tutorial ( The only deviation from the instructions that I made was that after adding the MIG to the board, I added an AXI Quad SPI, with enabled port SPI_0, and then ran "Run Connection Automation". When I ran my C program on the Arty board it worked fine, and printed "Hello World" to my PuTTY terminal. I've attached my board file as both .bd and .png. Second, I tried store this "Hello World" program to the Arty's SPI Flash using the "How To Store Your SKD Project in SPI Flash" tutorial. But, it did not work. I'll walk you through what I did because there are a few things that I am confused about. Unless otherwise noted I followed the instructions exactly. Before step 0: I don't know what the QSpi mode jumper setting is referring to, so I didn't do anything. Step 1.3: I compressed my bitstream so I left FLASH_IMAGE_BASEADDR as 0xF8000000, like I found it. Steps 2.1 and 2.2: I used my "Hello World" app that I created by following the "Arty - Getting Started with Microblaze" tutorial. I couldn't place the sections into mig_7series_0 because that wasn't an option, so instead I used mig_7series_0_memaddr. Step 4.1: I used offset 0xF8000000 because that is what I used in Step 1.3. One other thing: the test says to use Arty flash type mt25ql128-spi-x1_x2_x4 (which I do), but the image of the "Program Flash Memory" window shows them using Arty flash type n25ql128-spi-x1_x2_x4. Step 5: it doesn't work. Does anyone have any suggestions? Is the SPI Flash some sort of external hardware that I need to plug into the Arty? Thanks in advance.
  21. Hi, Is that possible to develop and deploy a standalone program from the SDK without installing the Adept software? Right now i have built my own program from the SDK, but without the Adept software it complains something like "'missing djgt.dll". thanks,
  22. Hi All, I am beginner in FPGA world. I am trying to learn how to work with Vivado IP Integrator. When i try to launch my firstProj on Launch on Hardware(System Debugger) I am getting a such kind of issue: make all Building file: ../main.c Invoking: MicroBlaze gcc compiler mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -MT"main.o" -I../../firstproj_bsp/microblaze_0/include -mlittle-endian -mcpu=v10.0 -mxl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"main.d" -MT"main.o" -o "main.o" "../main.c" Finished building: ../main.c Building target: firstproj.elf Invoking: MicroBlaze gcc linker mb-gcc -Wl,-T -Wl,../src/lscript.ld -L../../firstproj_bsp/microblaze_0/lib -mlittle-endian -mcpu=v10.0 -mxl-soft-mul -Wl,--no-relax -Wl,--gc-sections -o "firstproj.elf" ./main.o -Wl,--start-group,-lxil,-lgcc,-lc,--end-group /opt/Xilinx/SDK/2018.2/gnu/microblaze/lin/bin/../lib/gcc/microblaze-xilinx-elf/7.2.0/../../../../microblaze-xilinx-elf/bin/ld: firstproj.elf section `.heap' will not fit in region `microblaze_0_local_memory_ilmb_bram_if_cntlr_Mem_microblaze_0_local_memory_dlmb_bram_if_cntlr_Mem' makefile:35: recipe for target 'firstproj.elf' failed /opt/Xilinx/SDK/2018.2/gnu/microblaze/lin/bin/../lib/gcc/microblaze-xilinx-elf/7.2.0/../../../../microblaze-xilinx-elf/bin/ld: region `microblaze_0_local_memory_ilmb_bram_if_cntlr_Mem_microblaze_0_local_memory_dlmb_bram_if_cntlr_Mem' overflowed by 1168 bytes collect2: error: ld returned 1 exit status make: *** [firstproj.elf] Error 1 19:49:21 Build Finished (took 335ms) I try to search on google but cannot to find an answer. Can someone help to understand the reason? I am thiinking that this may be some tool setup issue. Thanks!
  23. I have been following this tutorial and have had no luck. I am uncertain about how to configure the QSPI IP, because the tutorial starts assuming that I have done that part successfully, so I am not even sure if this is the root of my problem. I have tried these two configurations of this IP, compiled them, and exported them to the SDK, and none of them solved the problem: I made sure JP4 is in the QSPI position. On step 3.1 in the tutorial, I can see that the FPGA is programmed successfully and I see the following output (since I chose not comment out the VERBOSE define as suggested in the tutorial): While programming the flash on step 4 I notice that my FPGA code is erased from the board (leds I had assigned to outputs turn off). Is that supposed to happen? At the end of the tutorial I get no "hello world" output on the terminal after resetting the board, though the FPGA does seem to program from the flash successfully, so that portion works, but I can't get the C-code to run from the flash. Here is the sdk_console_output.txt so you can see the steps I took in the sdk to program the board.
  24. Hello All, I am getting a make error when attempting to build the PMOD ESP32 driver in Xilinx SDK. I will attach a picture of the the error and my SDK flow. I included all the path directories for the console application folder in the C/C++ Build Directories. The problem is essentially that "XPAR_PS7_UART_0_DEVICE_ID" doesn't exist. Is it under a new name perhaps? Should I export "Main.C" to the "src" folder? Any help is appreciated! **This is the line of code that is giving me the issue** "#define HOST_UART_DEVICE_ID XPAR_PS7_UART_0_DEVICE_ID"
  25. This is a little DLL I wrote using C++ Interop in Visual Studio to pull some of the functions from the Adept SDK into C#. I'm posting it here in the hopes this is useful to someone else. It's pretty rough as I am absolutely not a Windows developer and I make no guarantees as to how well it is written and/or works (it does do what I need it to do ). Only supports basic DEPP functions as that's all I needed, other functions shouldn't be too hard to add at this point. Released under the BSD license.