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Showing results for tags 'schematics'.
Found 4 results
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Good day! I am designing a board that uses Zynq 7000 SoC and I came across a power management solution from NXP (MMPF0100) that might be the best fit for my application. I would like to understand the entire functionality of the PMIC. NXP had used this PMIC with Zedboard as a design example but haven't shared the entire schematic of the Zedboard using the PMIC anywhere. I request you to share the schematics of Zedboard with MMPF0100 and also the PCB design files, if available. Nishitha
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Within the schematics of the NEXYS 4 and NEXYS VIDEO boards I couldn't find the part with the Micro-USB JTAG bridge. The part with the FT2232HQ chip is left out in both schematics. Is there a reason for neglecting those parts? Could I find the schematics elsewhere? I'm especially interested in the differences between a combined JTAG and UART Micro-USB solution (as seen on NEXYS 4) and two separate solutions Micro-USB JTAG (1) and Micro-USB UART (2) (as seen on NEXYS VIDEO).
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Hi, The Arty schematics are missing the FT2232 component, therefore we cannot see to which FPGA pins it is connected. The only pins we know are UART_TX and UART_RX. But what about other FTDI pins? Like the ones to control the FIFO mode of the FTDI chip. Thanks! Regards,
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Hi, I downloaded the schematics for the NetFPGA-SUME and I'm working on a constraint file. (Is there one available?) On the first page, I see a signal PCIE-WAKE connected to the WAKE# pin of the PCIe connector. Where does that signal connect? Is that used to trigger PCIe rescan? Or is that the purpose of PCIE-PRSNT_B? Thanks, Jamey
