Search the Community
Showing results for tags 'sampling data'.
Hi all, I am implementing a simple parallel interface to an FT232H from FTDI to use the 60 MHz 8-bit parallel interface for training VHDL. While doing this a question popped up that I was unable to find answer to, the FT232H delivers a sampling clock to which all signals are synchronous - when sampling signals to this clock does this clock have to be routed to an MRCC pin or not? It seems that MRCC pins should be used for global clocks, but what about sampling clocks? Thanks for any clarification!