Search the Community
Showing results for tags 'real anallog'.
Found 1 result
The Following Question was posted on one of our Real Analog videos: I liked your lectures on the electric circuits.Indeed these are very informative and add a lot to one's knowledge.However I got confused in watching the lecture( 1.18) on "Active First Order System Example". You presented two active circuits.1.RC circuit connected to the +ve terminal of the Op-Amp.For this you told that there flows no current into the Op-Amp and this means there is no current in the feed back resistor and hence no voltage drop acros the resistor and so Vo=Vc(time15:25). But when you took the 2nd circuit ie the integrator then in that you told again that there is no current into the Op-Amp but now you changed your statement.You applied KCL there and told that it's equal to the current flowing into the capacitor(time 18:45).Now these two statements are contradictory.So which one is true? Please help clear this up. Thank you!