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Found 19 results

  1. Hello, I tried posting this on the Xilinx forums but got no response. These forums look more active and friendly so hopefully somebody can help me. I am really stuck. I am trying to follow along with the "How To Store Your SDK Project in SPI Flash" tutorial (https://reference.digilentinc.com/learn/programmable-logic/tutorials/htsspisf/start), but I cannot get it to work. I am using an Artix-7 35T Arty FPGA Evaluation Kit. I am running Vivado v2017.2 (64-bit) and SDK v2017.2 on a Windows 10 machine. First, I created a simple "Hello World" program by follo
  2. Hi, My setup is using Avnet Ultrazed board with PMOD AD1. Also I am using Xilinx Vivado & SDK 2019.1. I am successfully being able to use 1 channel of the PMOD AD1. I am trying to use both the ADC channels on the PMOD AD1. As the PMOD libraries has no board support files for the Avnet Ultrazed board I went ahead and created a QSPI IP block to get a single channel working. I am having trouble getting the second channel working. Few doubts I have are: 1. For the QSPI IP block, should I use it in standard mode or Dual SPI mode. (I have set the data pins as MISO. Also selected
  3. Dear all, I'm using Vivado 2018.3 and a Zybo Z7010 board. I have finally finished my project (I actually owe this forum much), and I am now trying to use the board without having to open nor Vivado neither the SDK. Basically, I know that I can program the QSPI flash memory of the board so that the program can run without having to upload it. How this works is still unclear, is switching from JTAG to QSPI enough or should I do something on Vivado? However, I am also using the Zynq processor which runs an application that I start from the SDK. Can I avoid opening the SDK?
  4. Hi, I am working on a project where i'm using Digilent zybo AP SoC with xilinx vivado for Hardware design and Xilinx SDK for software design. My application uses following protocol/peripherals: 1. UARTns16550 PL side (Programmable Logic) in interrupt mode. 2. GPIOs 3. Ethernet mac (lwIP stack) I started my software design using xilinx lwip perf client application project. Then i started modifying the perf client C code according to my need. My project contains Uartns16550, tcp/ip server and client program which receives real-time data. So coming to my problem, i am able
  5. Hi, I'm working on ZYBO SoC. I want to boot it from QSPI flash but it fails anyhow. I have tried two methods using Vivado and IMPACT tool. 1. After successful implementation I created .bit and .bin files for a simple led_blinky project. Than I added "Configuration Memory Device" and selected Spansion s25fl128s 3.3v flash. I loaded the .bin file and then Erased, Verify and Programmed the flash step by step by checking the checkbox. The problem is with verify step. It fails every time. even then if I program it ignoring the failed verify step, it obliviously doesn't boots the pr
  6. I have been following this tutorial and have had no luck. I am uncertain about how to configure the QSPI IP, because the tutorial starts assuming that I have done that part successfully, so I am not even sure if this is the root of my problem. I have tried these two configurations of this IP, compiled them, and exported them to the SDK, and none of them solved the problem: I made sure JP4 is in the QSPI position. On step 3.1 in the tutorial, I can see that the FPGA is programmed successfully and I see the following output (since I chose not comment out the VERBOSE define as su
  7. Hi, I have a project that uses Arty Z7-10 with pmodgps to receive the NMEA sentences every few seconds (I am using the GPS_getSentence function directly, rather than the sample code on github). The problem I am facing is whenever I program Arty via JTAG with a USB cable, my pmodgps is working correctly, but If I program the QSPI flash memory and use FSBL to boot it up, it seems to stop working. I have other pmods that are working fine in both cases, and only gps is not working as I am expecting. This seems like a weird bug to me. Does anybody have any idea what could be wrong?
  8. Hello. I am a beginner in FPGA. Also I am poor in English. Sorry. I am developing with Nexys Video. Although the design is complete, I am suffering from using QSPI Config and e-FUSE security together. I tried QSPI Config first. This worked well. Next I tried e-FUSE security. I wrote the security key and finished setting the FUSE register, After that, I could not program the QSPI. When executing the program, the following error will be displayed and will be aborted. -------------------------------------------------------------------- [Labtools 27-3165] End of startup
  9. Hello all, Does someone know how can I instantiate the STARTUPE2 primitive in a project that uses only TCL? I am working to port from Arty A7 to Arty S7 and notice the constraint file has missing qspi_sck signal, then the following appears at the Arty S7 .xdc file ## Note: the SCK clock signal can be driven using the STARTUPE2 primitive But the project uses only tcl scripts. How can I workaround this? I found HDLC and Verilog examples under UG953 but I have limited experience on how to use them using TCL. Will appreciate any comments. Best,
  10. Hello, I have a Nexys Video board and I have successfully loaded the “Nexys Video HDMI Demo”. I followed the tutorial "Using Digilent Github Demo Projects" to install and run the project through Vivado and SDK. I would like to learn how to get this demo to boot from QSPI flash following initial application of power to the board. I tried to follow this tutorial “How To Store Your SDK Project in SPI Flash". However, I get stuck creating the bootloader at step 1.2 as I do not have the option to use the ‘SREC SPI Bootloader’ template. When I try to select SREC SPI Bootloader, the SDK throws
  11. Hi all, I'm having an issue with the FPGA SPI interface I programmed onto my microzed. The issue is that the interface cannot read the data sent back from my slave device! I'm using a SAMA5d3-xplained devboard, and an oscilloscope to measure signals. I made the SAMA return the same buffer it received, only with every byte shifted. So it's a semi-loopback routine. The oscilloscope captures both the correct signal back from the SAMA (every byte divided by 2), AND the signal going into it (out of the MicroZed). However, the spidev_test.c (that seemingly famous SPI testing utility on the torv
  12. Dear Experts, I have a Zedboard and I am running Petallinux 2015.4, now I want to read and write to file that should be stored on QSPI. I followed this tutorial, http://www.wiki.xilinx.com/Zynq+QSPI+Driver but when I write cat /proc/mtd, it does not show any partitions but my device tree contains the same partitions. Kindly help me in this regard. Regards
  13. Greetings, I am currently working on a Digilent Zybo Trainer Board with a Zynq 7010 chip. Everything works fine from hardware up to software running on the board as long as it is launched directly from the Xilinx SDK. However, the software hangs up indefinitely whenever the Xil_In32() function is called ONLY when booting from non-volatile memory (QSPI flash or SD card). I have followed the prescribed process of making an FSBL, creating a boot image (with (bootloader)FSBL.elf, hw_wrapper.bit, main_project.elf) and programming the BOOT.bin file to flash memory successfully. The FSBL ca
  14. david.600

    booting from QSPI

    Hello, I have the Zynq 7000 board (Z-7010), i have built a basic led counting program in Vhdl. I'm trying to make this program boot by itself without Vivado. I'v found a few ref guides on this site and other sites and preformed this steps: 1. Open "Bitstream Settings", check "-bin_file*" checkbox and click OK. 2. Click on "Generate Bitstream" to generate your bit and bin file. 3. Open "Hardware Manager -> Open Target -> Open New Target..." 4. Add your memory. For this, right click on device (xc7a35t_0) -> Add Configuration Memory Device -> write
  15. hello, I want to interface zedboard(PL-Section) with external ad7768-4 ADC board using SPI interface via FMC_LPC connector. i have following questions: 1) how i can set SPI interface in zedboard (i mean, where i can assign "sclk, cs#, sdi, sdo" pins from ad7768-4 adc board to zedboard(PL-section) ) ? 2) can I access QSPI Flash by using PL-section of zynq 7000 ? 3) what is the meaning of QSPI Feedback, where it should be connected? 4) can i use QSPI in standard mode ? please help me ! Thank you
  16. Hai ., i had bought DIGILENT Zybo Kit 7000 series Family. i had flashed the Zynq boot image with the following offset values successfully on Zynq Board via Xilinx SDK (ver: 2016.4) fsbl.elf system_wrapper.bit U-boot.elf U-image 0x600000 dtb file 0xA00000 ramdisk 0xA20000 But the FPGA done_led is not working automatically after a power cycle. on the other hand, if i program the FPGA MANUALLY via Xilinx SDK , it works and kernel image loads suc
  17. Hi, I'm trying to make PmodAD5 work with a Zedboard by using Vivado 2016.2 (can also use earlier versions if needed). Digilent has a nice wiki pages to use Pmods with Zedboard, especially for using Pmod IPs: https://reference.digilentinc.com/learn/programmable-logic/tutorials/pmod-ips/start In this tutorial, however, there is no PmodAD5, and there reference design linked from Digilent product page to AD also has the implementation example for Xilinx ISE 14.4: https://wiki.analog.com/resources/fpga/xilinx/pmod/ad7193 Nevertheless I tried to combine the information I cou
  18. Why BASYS 3 USB mouse unrecognized when using QSPI? Basys 3 can be programmed to use mouse. Mouse is recognized and usable using a bit file. But when a bin file is used, the JP1 jumper needs to be moved to QSPI and the mouse movement and buttons do nothing. How can the USB Mouse be made functional after booting with jumper in the QSPI position?
  19. Hi, I had no Problem to program the qspi from Vivado by following the guide from the resource center. But that only gives me the hardware configuration. I also need to Program the Microblaze from the SDK. In previous projects with the ISE tool I used the iMPACT tool from Xilinx, but that doesn't seem to be available!? What is the best and easiest way to do a full programming (hardware and microblaze software) from the SDK? I am using the Vivado 2015.3 WebPACK with a Nexys4-DDR Board. Thanks party-pansen