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Found 6 results

  1. Dear All, "I'm working with Vivado 2018.3 and a Zybo Z7020 board" I write here because I have a very strange problem in a project that I have been developing in the past months. Namely, I've been writing a verilog code to run on a Z7020 board. This code takes user input as parameters (that are hence hard-coded) and everything works fine with this project (no errors or not understandable warnings...) Now, my job is to make sure that these so-colled parameters can be changed through a serial connection from a laptop. Hence, I've packaged my module in an IP and connected it to
  2. Dear all, I'm using Vivado 2018.3 and a Zybo Z7010 board. I have finally finished my project (I actually owe this forum much), and I am now trying to use the board without having to open nor Vivado neither the SDK. Basically, I know that I can program the QSPI flash memory of the board so that the program can run without having to upload it. How this works is still unclear, is switching from JTAG to QSPI enough or should I do something on Vivado? However, I am also using the Zynq processor which runs an application that I start from the SDK. Can I avoid opening the SDK?
  3. Well as the title says its pretty straight forward. I would like to connect a Master Port from PS to a Slave Port of the MB (PL), such that i can send data from PS to MB, but i cannot see where to enable them. Thanks for any kind of advice
  4. Hi, I am trying to get the Microblaze working with the PS hand in hand, i.e. some program is running on the PS and some of it tasks should be outsourced to the Microblaze. My question is how do I need to connect the Microblaze with the PS such that this communication possible ? Some guide/tutorial would be awesome. Thanks!
  5. Dear All, For the first time im trying to get the XMOD working with the PS side and print the values in a terminal. I tried a bunch of tutorials like the microzed chronicles.. I ended up using the tutorial posted as attachment, as attechments I also included my sourcecode and block design. I tried debugging by making several prints and I know the code works untll at least the "Test2" printf. During the build, no errors or anything appear. So i'm a bit confused into finding out where it all goed wrong. xadc.pdf design_1.pdf lab3.pdf
  6. Hello to al, The system is built on the Zybo board in standalone mode. So far I had success sending interrupts from PL via GPIO. In order to reduce complexity I decided to try sending interrupts directly as it is shown on the included diagram. The RTL module is a simple counter sending a pulse once in a period of time. ILA confirmed the pulse. The application is supposed to count 50 interrupt events and quit. However, no triggering is happening. Clock freq is 50 MHz and a counter is 16 bit. The C-code is taken from two sources: Xilinx Timer-interrupt example and Avnet interrupt tutor