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Found 8 results

  1. Hello Digilent Community, I am working on a image processing project and was wondering if anyone had advice or could point me in the right direction. I have tried following some tutorials and example projects, but I am still trying to wrap my head around Xilinx Vivado and SDK. The project really shouldn't be very difficult, I think I am just missing some information or the best way to go about doing it. For the project I am using the Zybo z7-20 development board and want to save two images to an SD card. The two pictures are black and white frames from a video just seconds apart, so there is only slight change in the frames themselves. I want to compare the two frames and output either a black and white image of the change in pixels or a binary file of '0' being an unchanged pixel and '1' being a change in the pixel. MATLAB has the 'Computer Vision System Toolbox' 'Tracking Cars Using Foreground Detection' Simulink example that is similar to what I want to do on the Zybo z7-20 FPGA. The following figure show the original video (right) with blob detection (the green square) and the binary output image of the change in pixels in the foreground (left). I want to use the Zynq Processor and write C code to do the analysis, but I haven't found a clear way to access the SD card from the Xilinx SDK. The following figure is of my current Block Design with only the Zynq Processor as well as some GPIO to test. I am still researching and looking at examples to compare, but wanted to see if the community had any pointers or if someone has done this before. I am a college student and I have been really interested FPGA's and digital design for the past 6-9 months, but I have mainly written my own Verilog code and haven't worked with block design or running C code on any of my designs. Any comments or suggestions would be great. Thanks!
  2. deppenkaiser


    Hello, now i have installed a Linux vm with petalinux on my Windows host PC. To begin my work i tried to create a petalinux Project with: petalinux-create -t project -s /home/username/projects BSP file is: Petalinux-Arty-Z7-20-2017.2-2.bsp /home/username/Projects is the path to the given BSP file; when i execute this command then i got the following error message: "ERROR: No PetaLinux projects found in the BSP /home/czymic/Projects!" What must i do to create a new petalinux Project? Must i always use the given BSP-file or can i create an own bsp file? How can i accomplish the tutorial: " PetaLinux BSP Installation Steps Follow the below steps to install a BSP: 1. Change to the directory under which you want PetaLinux projects to be created. For example, if you want to create projects under /home/user: $ cd /home/user 2. Run petalinux-create command on the command console: petalinux-create -t project -s <path-to-bsp> The board being referenced is based on the BSP installed. You will see the output, similar to the below output: INFO: Create project: INFO: Projects: INFO: * xilinx-zcu102-v2017.3-final.bsp INFO: has been successfully installed to /home/user/ INFO: New project successfully created in /home/user/ If the specified location is on NFS, petalinux-create automatically changes the TMPDIR to /tmp/<projname_timestamp>. If /tmp is also on NFS, it will throw an error. In the above example, upon execution of petalinux-create command, the projects extracted from BSP and being installed are listed on the display console. If you run ls from "/home/user", you will see the installed Projects." Thank you...
  3. Hello! I get the following error when I am going to run the createproject.tcl. Do I have to download an earlier version than 2017.3, if so is there a way to not do it since it takes me a lot of time to (uninstall and install) different versions. The error is: [Board 49-71] The board_part definition was not found for The project's board_part property was not set, but the project's part property was set to xc7a200tsbg484-1. Valid board_part values can be retrieved with the 'get_board_parts' Tcl command. Check if board.repoPaths parameter is set and the board_part is installed from the tcl app store. The reason why I want to run this project is simply because to see if the MIG7 IP is used without a uB which is what I am seeking for. regards, John
  4. Hello Digilent community, I am currently taking my first digital electronics class and my final project is a calculator written in VHDL using a Basys3 board, 16-key keypad, and a 16x2 LCD display with parallel interface, all provided by Digilent. I took a look at the provided example code from the resource library and I just had some questions about how it works. Now, the example code declares a constant before any of the processes, and this constant is an array of std_logic_vectors so it holds a preloaded message "Hello From Digilent" with the necessary function sets and all that preceding the message. In my case, I have to have a way to display the inputs from the keypad on the display and also display the output on the 2nd line of the display. I have the main logic part of the calculator settled, I just want to know how I can direct these signals from the keypad and the output of the computational module (as in the sum, difference, product, etc.) to the LCD display. I have never played with a display before now and never used VHDL or any type of board like the Basys3 before this class, so I guess I'm still quite novice and don't understand a good part of what the example code is telling me. I do get that the state machine is just cycling through the values in the constant and waits for certain delays to pass through before transitioning between certain states. Since the values on the display have to be updated live as the user inputs numbers from the keypad and also when there is a value computed, how can I shift from having a constant with a preloaded message to something that can update itself as needed? My idea was keep the idea of the array of std_logic_vectors but only have one value (rather than the 23 or 24 that are preloaded in the current example code) that will update with every key press. I'll have two of these, one for the inputs (to show the numbers and operations on the first line) and one for the output (to show on the second line). I'm thinking maybe I declare a variable within a process that will update and be sensitive to the key presses? Also, I tried looking around the reference manual and such but I could not find the function code for how to display information on the 2nd line; so far, stuff only displays on the first line. Sorry this is such a bulky post. I have had a lot of questions and my professor hasn't been around much. Also, part of this project is learning to interface with new components, so in my case the keypad and lcd display, and I'm not having much luck without any guidance unfortunately. Thank you for taking the time to read this! P.S. Attached the example vhd file from Digilent here for easy access in case anyone wants to look! PmodCLP.vhd
  5. I'm getting these errors when trying to run synthesis a demo project from the arty resource page. On that page I tired doing the XADC. i did get it to generate the .tlc file stuff to make the project I did download the board files for the arty and placed them in the boards_files directory. but maybe it's not implemented correctly or im missing something. Some xilinx forums said to click on the "open block design" to fix this but mine is grayed out and I can't select it. Most tutorials online show the old Vivado UI the 2017.1 seems to be slightly different. mostly likely due to the missing xadc_wiz_0 module but it shows up on the source list. Or maybe its a compatibility issue between Vivado 2016.4 and 2017.4 I'll wait for a response before trying something else.
  6. i need a simple project in that zynq ps read dada from a ip counter can you help me?
  7. Here's a game of tic tac toe in VHDL for the Nexys4 DDR, written as a set of finite state machines and not as a computer running a program. The design is inspired from John F. Wakerly's tic tac toe code from his book "Digital Design: Principles and Practices", but I've completely rewritten it. The game logic is contained in the files TTTdefs.vhd, TwoInARow.vhd and game_logic.vhd. The rest of the code is there to interface with the user: to print strings to the user, to get digits and to control when moves are made. There are also two UART driver components. You should be able to set this up as a Vivado project by importing all the .vhd files and setting up the .xdc file as the constraints. When you run the bitstream, open up a 9600 bps serial connection to the Nexys4 DDR board and follow the instructions that you should see: Welcome to the computerless tic-tac-toe game. You get to make the first move. Please enter moves as digits from 1 to 9. What move would you like to make? Cheers, Warren (c) GPL3, 2015
  8. I finally got some time to design my own Color Invaders project, originally inspired by Hamster's own Colour Invaders project. I ended up writing a lot of my own code for it since I have a personal thing about using somebody else's code in it's entirety, although Hamster's code obviously has a heavy influence on it's overall construction (thank you for posting it!). This game is similar to the classic Space Invaders game, or more closely related to Casio's Number Invaders on the calculator, where you have a stream of incoming invaders of a variety of colors coming down the WS2812 LED strip and you have to adjust the color of your missile to match the color of the first invader via the PmodENC (a rotary encoder). You can check out how I made the project as well as a small video showing some of it in action at