Search the Community

Showing results for tags 'pmodclp'.

  • Search By Tags

    Type tags separated by commas.
  • Search By Author

Content Type


  • News
    • New Users Introduction
    • Announcements
  • Digilent Technical Forums
    • FPGA
    • Digilent Microcontroller Boards
    • Non-Digilent Microcontrollers
    • Add-on Boards
    • Scopes & Instruments and the WaveForms software
    • LabVIEW
    • FRC
    • Other
  • General Discussion
    • Project Vault
    • Learn
    • Suggestions & Feedback
    • Buy, Sell, Trade
    • Sales Questions
    • Off Topic
    • Educators
    • Technical Based Off-Topic Discussions

Find results in...

Find results that contain...

Date Created

  • Start


Last Updated

  • Start


Filter by number of...


  • Start





Website URL







Found 5 results

  1. Hello, I am looking for a reference CAD model for the PmodCLP module, PB200-142 REV-B A step file or 3D part would be very beneficial for our design use case in terms of hardware constraints. Please let advise. Thank you, Istiaq
  2. I am not able to interface PmodCLP with arduino UNO. Code provided on the website is compiling but lcd is showing nothing. Please provide me the working code and image.
  3. Hi Is PmodCLP compatible with the Hitachi HD44780 driver ?
  4. I just got a PmodCLP and downloaded the verilog files here: Specifically, the Nexys 3 Verilog Example - ISE 14.2 code. Since I'm using an Artix Arty board, I had to modify the pins used, and the reset is reversed (on the arty the ck_rst is 1 when pressed), but after that things worked fine. The Arty, like the Nexys 3 has a 100MHz clock. In looking at the code, however, I noticed two errors that make the code quite confusing: 1) In the first always block: // This process counts to
  5. A customer asked the following question: