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Showing results for tags 'pmodamp2'.
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FPGA's can do some really neat things when it comes to PWM generation that micro-controllers can't do. Specifically, because they can operate at such high speeds, they can toggle the analog output line in unique fashions, and at *much* higher frequencies, than most PWM controllers. This blog article describes a simple "no-cost" change to creating better quality PWM. By "no cost" I mean that for certain interval lengths, this audio controller requires no additional flip flops, LUTs, multiplies, etc. I'm sharing it here because I've used it with the PMod AMP2 with great success. Dan
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Greetings! I would like to share a CMod S6 System on a Chip (S6 SoC) design. This project is designed to demonstrate how capable a CMod-S6 can be, while also demonstrating a home-grown soft-core CPU: the Zip CPU. In particular, the S6 SoC project demonstrates: The ZipCPU (GCC and binutils support are provided elsewhere via the Zip CPU project) Several PMod's: PmodUSBUART, PmodAMP2, PmodKYPD, and the PmodCLS--all running at the same time even! A small multitasking home-grown operating system, the ZipOS. In the spirit of Free and Open Source, all of the source co
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- cmod s6
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Is it possible to connect the PmodAMP2 board to active (amplified) speakers? From the schematic I see that the "sleeve" connector of the audio jack is connected to "OUT+" of the amplifier IC and not to GND as an active speaker might require.
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I am working on a school project making a sound (tone/ multi-tone) generator using a BASYS3 and Vivado. I am having trouble getting the sound part out. As a test I wrote a simple VHDL program to create a 357Hz square wave. I declared an output bit 'dataout'. I ran a simulation using Aldec-HDL Student Edition and I am getting the output squareware. I am using the PmodAMP2 connected to JB1 top row. In my xdc file I have dataout assigned to A14 ##Pmod Header JB ##Sch name = JB1 set_property PACKAGE_PIN A14 [get_ports {dataout}] set_property IOSTANDARD LVCMOS33 [get_ports {dataout}
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Hello, I'm making a project using Vivado, a Basys3 Atrix-7 FPGA Board and the PmodAMP2. The purpose of this project is to make a digital piano, but i can't find the proper code to send a specfic frequency to the Pmod AMP2 using VHDL and Vivado. Can someone help me out ? I'm pretty new to programming in VHDL. Thanks ! Robin
