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Found 4 results

  1. I think my question is general but i want to know how to initialize Pmod OledRGB using case when-statment i found some vhdl codes using this method but i cant understand it
  2. I and 2 other partners are having problems with the PmodOLEDrgb block diagram. When it is in the IP flow pops up when the project is open, and below shows the list of errors. I think the Pmod has an error in it, which even when I open the block diagram. When trying to regenerate the block diagram: ERROR: [BD 5-106] Arguments to the connect_bd_intf_net command cannot be empty. ERROR: [Common 17-39] 'connect_bd_intf_net' failed due to earlier errors. endgroup Opening the block diagram: [BD 41-51] Could not find bus definition for the interface: Pmod_out [BD 41-49]
  3. Digilent team, Thank you for putting a wonderful OLEDrgb pmod together. I just spent the last two days (or was it three? -- not Sunday, though) getting it up and running. It was a lot of fun. I would like to suggest, though, that you put more information into your reference manual for this project. Specifically, there was a *lot* of set up in the example MPIDE project that was necessary and that I wasn't expecting having only read the reference manual. I think at least some of this material would be worth while to place into the reference manual. Thanks! Dan
  4. Kind of new to the world of FPGA tinkering. Just bought an ARTY board and the OLEDrgb pmod. Struggling to find some verilog code for the SPI driver, together with some simple demo that I could use with Vivado, perhaps a simple MicroBlaze code snipet that drives the display. I could then use this a base going forward. Does anyone recommend anything here? Thanks Steve