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Found 3 results

  1. I and 2 other partners are having problems with the PmodOLEDrgb block diagram. When it is in the IP flow pops up when the project is open, and below shows the list of errors. I think the Pmod has an error in it, which even when I open the block diagram. When trying to regenerate the block diagram: ERROR: [BD 5-106] Arguments to the connect_bd_intf_net command cannot be empty. ERROR: [Common 17-39] 'connect_bd_intf_net' failed due to earlier errors. endgroup Opening the block diagram: [BD 41-51] Could not find bus definition for the interface: Pmod_out [BD 41-49] Could not find abstraction definition for the interface: Pmod_out [BD 41-51] Could not find bus definition for the interface: PmodOLEDrgb_out [BD 41-49] Could not find abstraction definition for the interface: PmodOLEDrgb_out When opening the packaged IP: [IP_Flow 19-570] Bus Interface 'PmodOLEDrgb_out': Cannot find bus definition file for "digilentinc.com:interface:pmod:1.0" [IP_Flow 19-569] Bus Interface 'PmodOLEDrgb_out': Cannot find bus abstraction file for "digilentinc.com:interface:pmod_rtl:1.0"
  2. D@n

    OLEDrgb

    Digilent team, Thank you for putting a wonderful OLEDrgb pmod together. I just spent the last two days (or was it three? -- not Sunday, though) getting it up and running. It was a lot of fun. I would like to suggest, though, that you put more information into your reference manual for this project. Specifically, there was a *lot* of set up in the example MPIDE project that was necessary and that I wasn't expecting having only read the reference manual. I think at least some of this material would be worth while to place into the reference manual. Thanks! Dan For those not familiar with what I've been up to, I am in the process of building a design for an Arty board that uses a PModOLEDrgb, PModGPS, PMod USBUART, and the PModSD card as well as the on-board peripherals. This may just be the last peripheral that I need to get working before I can get focused on the software I'd like to place onto the board: I've already got the ZipCPU, DDR3 SDRAM, flash, ethernet, GPS, UARTs, buttons/switches, LEDs, etc working. If you are interested, you can find all my code, test benches, simulations, etc. on GitHub. Every part of the design, save the MIG memory controller, is open source and released under the GPL. The design is still a work in progress, though, so the specification is lagging behind a bit, but I think you'll find the internal Verilog files fairly well documented. When the project is complete, I'll re-post the project link in the Project Vault forum for anyone who might still be interested.
  3. Kind of new to the world of FPGA tinkering. Just bought an ARTY board and the OLEDrgb pmod. Struggling to find some verilog code for the SPI driver, together with some simple demo that I could use with Vivado, perhaps a simple MicroBlaze code snipet that drives the display. I could then use this a base going forward. Does anyone recommend anything here? Thanks Steve