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Found 25 results

  1. jasonkh12

    Clocking Wizard

    I am new to FPGA. I know that nexys2 board (Spartan3E) has 50MHz oscillator. Is there a way to generate 100MHz clock, since Clocking Wizard in IP Core does not support this board? Thanks
  2. I am new to FPGA. I have several problems in connecting OV7670 to Nexys2, so i decide to test wether it is broke. I have tried to connect XCLK with 25MHz output from scaling 50MHz Nexys2 clock, then i connect the pixel clock PCLK to oscilloscope. Unfortunately, i cant see any clock signal on PCLK. I connect the 3.3V and the ground pin properly. Any other pins remain unconnected. Did i miss something?
  3. Hi, I have lost firmware for Nexys 2 USB Controller (CY7C68013A-56) which is stored on 24AA128-EEPROM. I want to update it by CyConsole application. Could anybody help? Thanks
  4. Hello everyone, I want to communicate with the Nexys2 device through the libusb library on Android devices, but I can't know the control transmission content with the Nexys2 endpoint 0(Control port). Who can provide the Nexys2 firmware source code? can you help me?
  5. I am currently trying to implement the related Android Application on the basis of Android phone and Digilent Nexys2 communication. And I know that Digilent Adept is a unique and powerful solution which allows you to communicate with Digilent system boards and a wide assortment of logic devices. However, I learned about that the official website only provides the shared libraries (.so) that support armhf, i686 and x86-64 at present.(https://reference.digilentinc.com/reference/software/adept/start?redirect=1#software_downloads) Now I need to compile and generate the shared libraries (.so) that support armeabi or armeabi-v7a (CPU architecture supported by Android) by myself. Do you know where can I find the source code for the shared libraries (.so) (C or C++ code)? I urgently need this source code!!! Can you help me?
  6. I am currently trying to implement the related Android Application on the basis of Android phone and Digilent Nexys2 communication. And I know that Digilent Adept is a unique and powerful solution which allows you to communicate with Digilent system boards and a wide assortment of logic devices. However, I only find the shared libraries (.so) that support armhf, i686 and x86-64.(https://reference.digilentinc.com/reference/software/adept/start?redirect=1#software_downloads) Now I need the shared libraries (.so) that support armeabi or armeabi-v7a. Do you know where can I find the shared library (.so) that support armeabi or armeabi-v7a? Can you help me?
  7. I am currently trying to implement the related Android Application on the basis of Android phone and Digilent Nexys2 communication. Through the official website I learned that the WaveForms Live device manager enables users to add, configure, and connect to WaveForms Live compatible devices. (https://reference.digilentinc.com/reference/software/waveforms-live/add-device) And I know that Digilent Adept is a unique and powerful solution which allows you to communicate with Digilent system boards and a wide assortment of logic devices. However, I only find the libusb shared libraries that support i686 and x86-64(https://reference.digilentinc.com/reference/software/adept/start?redirect=1#software_downloads) I want to konw the following questions: 1. Can WaveForms Live connect to Digilent Nexys2? 2. Is Digilent Nexys2 a WaveForms Live compatible device? 3. Is the Android app of WaveForms Live use the libusb shared libraries?If is,what is the CPU architecture the libusb shared libraries? 4. Is there the libusb shared libraries that support armeabi or armeabi-v7a on the official website. If is, where can I find it? If not, does this mean that the development of Android applications can only be applied to Android phones or pad that support X86 or X86-64 Can you help me!
  8. Hi, I need the .iic file in order to upload the eeprom IC5, where the Cypress CY7C68013A firmware is stored, by means of CyConsole tool. Currently IC5 does not assert the USB-ON signal, which enables the power on the board. Sincerely, Radek (rsip)
  9. I used the Nexys2's EPP-like parallel interface on my latest (not all that much) FPGA related project - a software GPS receiver. The FPGA was used to capture the raw one-bit samples form a GPS receiver front end at 5,456 MB/s for 200 seconds, without dropping a single bit. I miss the ease of use and the high bandwidth of the old EPP interface... The FPGA code and the C source to read data from it is at https://github.com/hamsternz/Full_Stack_GPS_Receiver/tree/master/misc
  10. Hello everybody, I'm a trainee in digital electronics, i should achieve a migration of VHDL codes from the Digilent Nexys 2 which is obsolete to another board, after some researches, I would like to work with the Nexys4DDR board. However, there is a problem of the number of connectors in the Nexys4DDR, in my project, I need at least 40 pins for my signals, it was possible with the Nexys2 thanks to the Hirose FX2 connector which disappears in the new Nexy boards. Should I choose another FPGA board or add an expansion to the Nexys4? In the last case, will there be synchronization problems?
  11. Is there anyone who can help me with this error code. "Error: Xst: 1817 - invalid target architecture xc3s500efg320-5 I bought the book Digital Design Using Digilent FPGA Boards and fully the step by step It comes with this error code when I try to synthesis. I use ISE / webpack 14.1 Nexys 2 board
  12. Greetings everyone. I'm Samuel A. Falvo II, creator of the Kestrel-3 home-brew computer project. I'm currently using the Nexys-2 board as a development platform, since that's a known-working software/hardware configuration for me. My plan is to migrate to something different/better after I get a working reference model here. Related to this project, I'm completely ineffectual at getting the PSRAM chip to function. I was wondering if someone else has created a 16-bit Wishbone(-compatible/-like) interface to the PSRAM chip that I can re-use in my MPLv2-licensed project. After a month of trying to hack my own, I've come to the conclusion that my PSRAM chip is utterly dead on arrival: When in asynchronous mode, I could never get the chip to respond to memory writes beyond a certain (and seemingly completely unpredictable) point. But, it could read OK, as evidenced by a stable image of noise on my monitor (video refresh is configured to use external memory). When in synchronous mode, I'm utterly unable to get the PSRAM chip to drive the DQ pins when trying to read from the chip. As a result, video shows a stable pattern of pixels corresponding to the last 16-bit word written out to memory (since this precharges the DQ lines, the video circuit sees this state and treats it as valid pixel data). It is completely unknown if it's actually responding to write transactions. I just don't know, and honestly, I'm getting rather desperate now. So far as I'm able to tell, I'm well within the timing parameters of asynchronous and (especially) synchronous mode operation. If there's an existing design I can re-use to sanity-check my design, that would be especially helpful. Thanks in advance.
  13. Hi, i need to change the eeprom a little to achieve my communication tasks I need the whole file(firmware source program) in order to understand it and achieve my needs by using it. who can help me! Thank you very much!
  14. Hi, i need to change the eeprom a little to achieve my communication tasks I need the whole file(firmware source program) in order to understand it and achieve my needs by using it. Thank you very much!
  15. Hi, i broken the eeprom IC5 where the Cypress CY7C68013A firmware is stored. I need the .iic file in order to upload it again to a new eeprom with Cypress CyConsole tool. Thank you very much!
  16. Hi, i broken the eeprom where the Cypress CY7C68013A firmware is stored.(Nexys2) I need the .iic file in order to upload it again to a new eeprom with Cypress CyConsole tool. Thank you very much!
  17. I have problem in Nexys2 and nexys3 FPGA kit they are not detected as by boundary scan for system genrator even proper and compatible versions of matlab and Xilinx are installed for system genrator if anyone can help please ????
  18. Hello All, I am new to these forums, but I am looking for some guidance on a home design I am working on. I have 2 Nexys2 boards that I want to attach transceivers to each of them so I can send data between the two Nexys2 boards. Does anyone know of any solution available to accomplish this. I know the Nexys2 boards are old, but I own 2 of them and it will save me money to use them versus buying 2 new Xilinx FPGA boards to accomplish this task. Please advise if anyone is aware of possible solutions for this task. Thanks Sincerely, MH301
  19. alksdlas

    MemUtil with Nexys2?

    I'm trying to use the MemUtil program to load a file into the PSRAM on my Nexys 2 but all of the bit files included in the download give me an IDCODE error when I try uploading them to the FPGA (Spartan3E-500). Does MemUtil not support that FPGA? If not, any other suggestions for an easy way to load 16MB of data into the RAM? Thanks!
  20. hi so , i need to convert an analog signal with the Pmod AD1 and filtering this signal with two RII filters ( low pass and high pass ) and recover the filtering signal with the DAC Pmod . i need the implementation code with vhdl and how to make synchronisation between conversion and filtering note : i use Digilent nexys 2 board i need your help plz
  21. Hi I am new here. My background is I used ISE 10 but mainly used the schematic capture and the FSM software for my designs. I used a little VHDL and Verilog from the library to form some blocks for my schematic projects. For the most part my designs have all centered on Schematics. I have some unique design blocks for full projects I did with the finite State machine software. I have in stock has a Nexys 2 board with a Spartan 3500E on it and I was planning to use for a demo model when I found out this board is being discontinued. I like the 7A100 you have on the Nexys 4. This will multiply my capabilities compared the old board I had. I also downloaded the Vivado series design tool and found it very powerful in some aspects to ISE. I lost my connection to someone that can write code and Tcl script. I need to get this demonstration model done ASAP so I have the following questions. I see you cannot migrate schematic files to Vivado. I don’t want to migrate complete projects just the blocks of circuits in them especially the ones I generated from the FSM software which is converted to VHDL and Verilog. Can I make custom IP’s from them and use them in Vivado? Are there files I can take from my old ISE project circuit blocks and can use in my IP catalog and Vivado? In the IP catalog I don’t see some circuits I need in my design.I don’t have time for a learning curve. Is the Vivado software a software that requires more knowledge and experience concerning writing code than I have (which is limited)? If I can handle the learning curve using the Vivado design tools in a descent amount of time, I want to use the Nexys 4 with 7A100 in it. If I can’t then I will have to use the Nexys 2 board that has. the Spartan 3500EWhat kind of prerequisites in learning do I need to perform a successful project in Vivado?Thanks Rex
  22. CNFM, an academic organization in France promoting microelectronic education, created a one board one student program to let students use Digilent FPGA board outside the classroom. The professor shared their class materials in https://sites.google.com/site/l2s3ae/ All materials are in French.
  23. Let's say I have a .bit file on my Mac, and I've got a Nexys 2 plugged into a USB port. As far as I know, Adept isn't available for OS X. What, if any, are my options for programming the board? Is there any documentation available for interfacing with the USB-FX2 controller it uses? (If it comes down to it, I'm comfortable putting something together with libusb.) (Yes, I'm perfectly aware that the Xilinx tools don't run on Mac OS X. And no, I'd prefer to not use a virtual machine. I have my reasons.)
  24. I've got a Nexys2 and a Basys2. I'd like to program them under Windows 8.1. From what I can tell, the only Xilinx software that's supported under Windows 8.1 does not support the Spartan 3E chips. Is there any way to program those chips from within Windows 8.1? Thanks, Keith