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Hello, I have been trying to implement a SHA256 alghorithm on my board without success so far. Right now, nothing is failing, but when i enter a letter in TeraTerm to hash, i receive random characters. The UART module works on its own and the simulations give the right results and now i am stuck. I will attach my verilog code and 2 pictures with some timing analysis in the synthesis and implementation part. My question are as follows: 1. No paths are failing, but some of them have some high logic levels and Fanout. Even though the paths are failing, do i need to worry about that? May
Any & all help is appreciated with this thread. I am 100% new rookie to FPGA. I purchased the Digilent Zybo Z7: Zynq-7000 ARM/FPGA SoC Development Board (Zybo Z7-20 with SDSoC Voucher) My intentions are to crypto currency mine a new FPGA algo called Odocrypt created by the blockchain group Digibyte DGB. Here are a couple links to the info. https://www.dgbwiki.com/index.php?title=FPGA_mining https://www.coinfoundry.org/pool/dgb5 DigiByteCoin Github Odocrypt Mining Software https://github.com/DigiByte-Core/odo-miner It will change every 10 days. Its supp
Hello, Need Help ASAP. I have a working code of FPGA (Altera DE2-115 ,cyclon-IV) for coin mining. Can I use that code on NetFPGA 1G CML for mining, if not what changes should I made in code? If yes, Then how can I connect it with Ethernet (PHY) of NetFPGA 1G CML? Will I need extra coding to connect it with Ethernet protocol? Thankx