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  1. Hello folks, I am working on zynq 7000 board in which artix 7 fpga is there.In the old design spartan 3 was used. I am working on migration from ISE 8.1 to vivado 19.1. I have migrated vhdl code easily but facing problem in migration of processor side. I have created a new block design in vivado by using IP integrater with the reference of MHS file in ISE. In ISE 8.1 block design program run from SPI FLASH which is connected to microblaze and which copy the contents from FLASH to SRAM (external memory connected to microblaze in block design). In zynq 7000 as FLASH