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Found 13 results

  1. Hello! I have an example design where I am writing values into a BRAM. I have confirmed through simulation that the values are stored correctly. However, what I want to do is to confirm that the values are saved running on hardware as well? I have been trying to debug using the TCF debugger and trying to check the Memory window on the uB but I am not getting anything sufficient or understandable. What should I do if I want to, for example, test my memory through the MicroBlaze, shall the D-cache and I-cache be enabled? Could you give me any suggestions or examples on how to confirm the content without using simulation? My initial goal is to start with a BRAM and then go on with an SDRAM as well. regards John
  2. Hello everyone, I'm using Zybo and i want to create a custom ip. The ip will have two inputs (as registers) that has 32 bits: Let's call them a[31:0] and b[31:0]. And i want to get memory value at a and add b. The calculated value is a new memory address and i want to read value at that address and write it into the third register of ip. But i haven't find a tutorial like this. If there's any, i would like to know it. Thanks for your time.
  3. dgottesm

    Memory tutorial

    Hi I am beginning my foray into FPGA design, and I decided that the best to to learn would be to learn on the go, and learn as I go. I am using a Zybo Z7 7020, Windows 10, and Vivado 16.4 I have a project for school which will be using PMODs as IOs and the information will have to be saved to memory of the board I am wondering if there is a good tutorial which will help me learn how to access, read and write to the DDR3
  4. hello, I used the zybo_hdmi_in as reference for my project. I struggled with the VDMA. After some modifications (added image sensor as input) It seems so I have my program code overlapping with the DDR memory of my frame buffer. I found that my design works once I added an offset to the DDR_0_BASEADDRess. Without the offset the VDMA gives an address encoding error. I increased the offset until it works. Now, the printf's are no longer showing... Looking into UG585 (TRM) the VDMA is definetely within the address range 0010_0000 to 3FFF_FFFF and there seem no overlap. Can anyone suggest me a good document where I can learn more about Zynq memory mapping, and observe problems like stack overflow etc? thanks
  5. I am trying to figure out exactly what components on the Analog Discovery 2 are/contain non-volatile memory. I see that there is the calibration memory which must be NV because the user can re calibrate the device (I'm assuming that you don't have to do this at every power on, I may be wrong). Is this calibration memory Non-volatile? Are there any other IC's on the board that have NV memory on them? Are there any other NV memory IC's on the board? I saw that in the Analog Discovery 2 reference manual, you guys provide schematics of all of the functional parts of the Analog Discovery 2 device (i.e. ADC - analog section, ADC - digital section, etc.). I was wondering if there was a place I could find the full schematics for this device or at least a full BOM that I could cross reference each IC to and determine whether or not each component has NV memory. In our lab, anything that has any form of NV memory creates complications for us and I would need verification that this device does not in fact have any NV memory, or, if it does, I need to know exactly where on the device this NV memory resides and how it is written to if we are going to use these in our lab.
  6. Dear Expert I am working on Petalinux 2015.4 and Zedboard. I want to have a contagious 4 MB block of DDR to communicate with PL and have the physical address of the its Base. -Can I have this much memory allocated? -How can I get physical address of the memory? Regards
  7. I'm working on some embedded software on the Arty board and programming in Microblaze. When I try to allocate an array of sixteen-bit numbers, length 512, it works just fine, but the same array set to length 1024 causes malloc to return NULL. After some experimentation and testing, I believe this is because the Microblaze processor has run out of internal memory. However, the Arty board is supposed to have 256MB of DDR memory. An interface to the memory already existed in my block diagram (copied from Getting Started With Microblaze with some PMods added), so I assumed that the DDR memory was already being used by the Microblaze processor, but 256 MB of memory shouldn't be struggling to deal with a 2KB array. (Outside of the allocated array, the program is very small.) Is there something special I need to be doing to access the DDR memory from inside Microblaze?
  8. in poking around the Analog Discovery 2 documentation i couldn't find the oscilloscope memory depth specification. i did a search for "memory depth" in the forums and came up empty as well. my questions are: what is the oscilloscope memory depth? what is the arbitrary function generator memory depth? what is the 16-channel digital logic analyzer memory depth? what is the Spectrum Analyzer memory depth? what is the 16-channel pattern generator memory depth? thanks, jeff
  9. I unable to resolve the issue please kindly fix this if anyone had experience in this..... img.vhd mat_ply.vhd bram1.coe
  10. Hi, I want to use the ADC port with 8 bit accuracy in basys3 board using system generator for vivado. How can I do this? When I specify IOB location constraints in gateway-in, it requires me to set the number of bits to 1 which is a problem because I need 8 bits to read my analog input. How do I do this? I am not able to define non-memory mapped ports because the System generator board description builder(SBDBuilder) is not available. There is also no function defined as 'xlSBDBuilder'. Matlab shows the error >> xlSBDBuilder; Undefined function or variable 'xlSBDBuilder'. Kindly help, Thank you
  11. Hi, I have developed a simple verilog program that reads a matrix from a text file, loads it into BRAM, performs some computation and then store the output back into BRAM. I have simulated the program and it works as expected. Now I want to test it on the FPGA, but I am not sure how to do that. 1- If I continue to use BRAM, how can I view the content of the BRAM after the execution is over to verify the output? 2- If I decided to use USB flash memory to read the matrix and write the result, how do I specify the names of the input/output files? There are a lot of resources that explain AXI USB and SPI using memory addresses, but how can I know the addresses of the input/output text files? Thanks! Wesson
  12. Need help writing some code with a Nexsy 3 Spartan 6 FPGA. Using a state machine I need to write a series of words to the on board memory. Then with a slider switch the write is stopped and the words are displayed in sequence using the on board LEDs in 1 Hz intervals. I already have the code written to divide the on board clock to 1 Hz named "newclk2". Any help would be great. Thanks!
  13. From the album: HDMI2USB.tv - Firmware for capturing HDMI and DisplayPort via USB and Ethernet

    __ _____ __ _______ ___ __ _________ / // / _ \/ |/ / _/ |_ | / / / / __/ _ ) / _ / // / /|_/ // / / __/ / /_/ /\ \/ _ | /_//_/____/_/ /_/___/ /____/ \____/___/____/ alternative Copyright 2015 / EnjoyDigital florent@enjoy-digital.fr Alternative HDMI2USB gateware and firmware based on Migen/MiSoC [> Supported Boards ------------------ This firmware is supported on the following to boards; * Digilent Atlys - http://digilentinc.com/atlys/ The original board used for HDMI2USB prototyping. Use `BOARD=atlys` with this board. * Numato Opsis The first production board made in conjunction with TimVideos.us project. Use `BOARD=opsis` with this board.

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