Search the Community

Showing results for tags 'jtag'.



More search options

  • Search By Tags

    Type tags separated by commas.
  • Search By Author

Content Type


Forums

  • News
    • New Users Introduction
    • Announcements
  • Digilent Technical Forums
    • FPGA
    • Digilent Microcontroller Boards
    • Non-Digilent Microcontrollers
    • Add-on Boards
    • Scopes & Instruments
    • LabVIEW
    • FRC
    • Other
  • General Discussion
    • Project Vault
    • Learn
    • Suggestions & Feedback
    • Buy, Sell, Trade
    • Sales Questions
    • Off Topic
    • Educators
    • Technical Based Off-Topic Discussions

Find results in...

Find results that contain...


Date Created

  • Start

    End


Last Updated

  • Start

    End


Filter by number of...

Joined

  • Start

    End


Group


AIM


MSN


Website URL


ICQ


Yahoo


Jabber


Skype


Location


Interests

Found 88 results

  1. Chase

    JTAG-HS2 program issue

    Hi Digilent, I often got a information " The selected cable is being used by another application. Please retry the current operation. " from ISE iMPACT 14.7 when I used JTAG-HS2 device to program xilinx Spartan-6 device. But I did't use JTAG to do anything. I had make sure the driver is last. Does anyone have any idea? Thanks.
  2. Hello, I am trying to interact with my Basys 3 board through the JTAG port on the board but I am not sure what cable to use with it. The cables listed for sale that I've seen, like the JTAG-HS2, say that they are not needed for Digilent FPGA boards. Is there a cable that is intended for use with the FPGA boards? Thanks, Seth
  3. Hi, I have a brand new Digilent A7-35T board I tried to program via the USB built in JTAG using Vivado 2018.2. The part intermittently shows up in Hardware Manager, but a seconds later disconnects. Sometimes it disconnects just being connected (opened) in Hardware Manager and sometimes during programming. It is even worse if I try to erase and program the QSPI flash. I also downloaded and installed the latest Digilent Adept 2 with updated drivers and observed the same behavior. I tried different USB cables, different USB ports directly on my PC, via a powered hub, but the behavior is always the same -- it intermittently disconnects and fails. The amber LED does however stay lit. In Device Manager I am able to see the FTDI UART. I did also see it enumerate as a Microsoft BallPoint Mouse -- whatever that is. With this exact same setup, PC, Vivado, USB cables, etc, I have been programming the Zybo Z7-20 and the Arty boards with several designs without any such issues. Please let me know if I missed anything and what are the next steps in getting the board replaced or fixed. Thanks.
  4. Hi, We have a custom board which requires use of an FTDI FT4232H Quad HS USB-UART/FIFO IC chip (VID: 0403, PID: 6011). The JTAG interface is on channel A, SPI/I2C interface is configured for channel B, VCP on channel C, and GPIO on channel D. Is there any way we can enable Adept support for this FTDI part?
  5. Is there a way to stop generating the temporary files in below directory while accessing hw_server using Digilent cable. We are using Vivado 2018.3 to access the HW. Ø /tmp/digilent-adept2- Ø /dev/shm/diligent-adept2-* For some reason, few of these files appear to become “stuck” in the locked position on occasion which is what causes the below error: TCF 14:00:21.002: jtagpoll: cannot get port description list: ftdidb_lock failed: FTDMGR wasn't properly initialized TCF 14:00:21.012: jtagpoll: cannot get port description list: JTAG device enumeration failed: Initialization of the DPCOMM library failed. …above Errors are generate when hw_server was ran before Quick Search suggested a driver issue but if I delete the tmp files then it works fine. Any suggestions would be appreciated! Thanks HJ
  6. Hi - I just tried to install the XUP USB-JTAG Programming Cable from diligent. I also have a Diligent Programming Cable. Centos can see both cables (see below) Vivado can see the Diligent programming cable but not the Xilinx one. Given the physical constraints of the installation only the Xilinx one will work. Are there any specific instructions to get the Xilinx cable going? $lsusb | grep "Xilinx/|Future" Bus 002 Device 003: ID 03fd:000d Xilinx, Inc. Bus 001 Device 006: ID 0403:6014 Future Technology Devices International, Ltd FT232H Single HS USB-UART/FIFO IC
  7. Hello I have a Digilent USBJTAG HS2 and I'd really like to use it with TopJTAG's Probe software. The software has native support for the Digilent USB-JTAG but not the USB JTAG HS2. Having said that, it supports "custom" JTAG probes based on the FTDI chipset and recognises the HS2 as such. This is encouraging. When I select the Custom FTDI option it asks me to tell it what to do with the FTDI GPIOs and advises that different probed need their GPIOs setting up differently - often to enable buffers, drive tRST, and stuff like that. Sounds fair enough to me. The problem is that I cannot find documentation on how the GPIOs are used/configured on the HS2. The schematic would help, but the link to the schematic on the digilent website is dead. Can anyone help with the GPIO config or a schematic of the HS2? Many thanks. Andrew
  8. We are currently using the Digilent JTAG HS3 cable. Our setup does not allow enough room for the module without using a right angle connector from our FPGA board which has a 2x7 pin header. On the other end we have a Motherboard with a 4 pin USB header. I'm looking for advice thoughts on a simple solution to go from a our FPGA board with the 2x7 pin header which has little vertical space (so need a right angle connection) to the Motherboard 4 pin USB header. Maybe this can't be done with a single cable? Maybe it needs to be several separate parts (i.e., right angle connector + JTAG HS3 + USB cable)? Thank you!
  9. Hi All, Is there anybody have any experience about XUP (Xilinx University Program) USB-JTAG Programmer Revision-G using with Vivado 2015 or 2018? I have some little experience with Vivado 2015.5 and 2018.1 but regarding my experiences XUP USB-JTAG Programmer is not compatible with Vivado? I tried all ways on Centos-7 OS and the particular script (install_drivers.tar.gz). I aimed to program the Zedboard for petalinux applications developing but no success with XUP USB-JTAG Rev.G and Vivado running on Centos-7. Could you please share any suggestions if you have? Regards. Kursat Gol
  10. JTAG-USB-FTDI

    JTAG-USB Question

    I am interfacing between a USB IC (a FT2232H FTDI chip) and a EEPROM IC (a 93AA56BT). To make the FTDI chip recognizable by Xilinx tools I need licensed Digilent Serial Numbers. How can I get a licensed serial number file to enable a USB-JTAG FTDI interface? Are these licenses keyed specifically to your chips? How can I enable a JTAG-USB FTDI interface?
  11. Does anyone know the OS/SW overhead when shifting JTAG bit chains from controller to device? For example, how long it takes to execute this function from the Adept SDK library? DjtgPutTmsTdiBits()
  12. Hi, We are going to purchase JTAG-USB Cable to debug our own developed chip. 2 questions here: 1. I assume this JTAG-USB Cable is able to auto-sense my VDD voltage level as long as it is within the range 1.8V ~ 5.0V. Is this correct? 2. We need this JTAG-USB Cable to do some configuration in our chip. Do I use "Digilent Adept Suite" or "Digilent AVR Device Programmer" to generate my JTAG signals/waveforms ? And one request: 1. I need a datasheet of JTAG-USB Cable datasheet if possible. Please advice, thank you. Tifei
  13. Hello everyone. I need to know the part number of the J10 USB UART connector integrated in ARTY-7 board. Best regards.
  14. anshumantech

    HS1 JTAG Circuit

    I want to know about the circuit diagram of HS1. Can anyone help me out with it? I searched on Digilent website too but it is currently unavailable there.
  15. I have been working on developing an I2c interface on the arty s7 board, and during one of my hardware tests, I noticed that my debug LED's had shut off. I went to resend my bit stream and noticed that my hardware manager was no longer connected to the device. Whenever I plug the device in, it is clear that I am getting power, as the done LED, the power LED, and the TX LED are all on. However, when I attempt to reset the device using either the reset or program button, no change occurs (that is, the strobing LED pattern does not commence as it has in the past). I have checked my device manager and found that the s7 is no longer connected, and have restarted my computer as well as unplugged and replugged the s7. My primary concern is that this may be a hardware issue, but I am unsure as to what I could have done to cause this. I have been running 3 3.3v pins from the arty to a teensy. Any advice would be helpful. Thanks, Micah
  16. Hello , I am working with Metaware IDE and the device uses Digilent HS2 JTAG cable. But there is a problem with the JTAG cable and I could not identify the issue. Kindly guide me with this. I have attached the picture of the error. Thanks
  17. Hello, I'm planning on buying the product "Cmod C2: Breadboardable CoolRunner-II CPLD Module" to make some prototypes of future designs. I saw that, in order to program its CPLD (XC2C64A), I need to buy a USB to JTAG cable. Is the Diligent's JTAG-HS1 programming cable compatible with that CPLD and board?. I will be using the last version of ISE on Windows 10, will it be a problem?. If it helps answering, this are the links of the Digilent's store of those products: Breadboardable CoolRunner-II: https://store.digilentinc.com/cmod-c2-breadboardable-coolrunner-ii-cpld-module/ JTAG-HS1 programming cable: https://store.digilentinc.com/jtag-hs1-programming-cable-limited-time/
  18. I just received my JTAG-HS3 Rev A programming cable and if I plug it into my windows 10 machine I don't see anything unique showing up in the device manager. I know something is popping on and off because I can hear the device attached and device detached sounds from windows. So what should it show up as?
  19. Hello, I am using Arty-Z7-10 board with 3 Pmods (NAV, GPS and RTCC), while there are only 2 JTAG ports available on the board. So, I decided to buy one of these 2*6-pin JTAG splitter cables and divide one of my JTAG ports between PmodGPS and PmodRTCC (since both of them need only one row of JTAG). Now, I am trying to make a block design and connect both of them to one JTAG, but it does not seem to be feasible. When I connect the first Pmod to the JTAG port, it occupies the whole port and it does not allow me to add another Pmod to it. Is this something I have to do in Verilog, and modify my XDC file? or is there an easier way to do it by just dragging and dropping the IPs in the block design? Best, Mahdi
  20. Hi FPGA gurus ! I am facing trouble while trying to attach my Atlys USB JTAG device to a Centos 6 virtualbox VM. I recently had no choice but to upgrade my computer from Windows 7 to Windows 10. As a Windows 10 version of ISE 14.7 was available, I decided I could do the upgrade before realizing that ISE 14.7 for Windows 10 was indeed ISE 14.7 for Linux running a VirtualBox... Nevermind. The problem is that it seems I can't attach Digilent USB JTAG to the VirtualBox. Here is my configuration : Windows 10 Pro VirtualBox 5.2.8 (I upgraded it so that I could install Extensions to enable USB 2 and USB 3 support) Adept2 is installed on Windows 10 and works fine, Atlys board is recognized and I can run the test application OK. Now, here is my problem : Let's turn on the computer first and do a fresh test ! Atlys Board is attached to USB ports (JTAG and UART) but is turned off. VirtualBox USB configuration is configured as shown in USB_parameters.jpg Now, let's turn VM on, Atlys board still off. The attachable USB device list in VB is shown in USB_devices_atlys_off.jpg As you can see, neither JTAG nor UART devices are listed, which is expected as Atlys board is off. Now, let's turn the Atlys board on and see if the listing has changed... It has ! as shown in USB_devices_atlys_on_1.jpg Also, you can see in Device_mgr.jpg that Windows has no driver problem with JTAG and UART devices. You may notice UART device is automatically attached. Looking at /dev/tty* shows that the UART device is now available through /dev/ttyACM0 as shown in TTY_devices.jpg Let's have a look at the JTAG device status (USB_devices_atlys_on_2.jpg), it reads "captured", whatever that means ... Now, let's try attaching it... It raises an error with message shown in Digilent_USB_JTAG_attachment_error.jpg "USB device is busy with a previous request" :/ This is sad ... Of course, no other device appears in /dev/tty* Greping dmesg for FTDI pattern returns Nothing. Only UART USB devices appears in dmesg log... I've tried the same test with USB 3 (xHCI) configuration selected. Do any of you have an idea on how I could attach the USB Digilent JTAG device to my Centos 6 VirtualBox machine ? Any help will be highly appreciated. Thanx a lot. Cheers
  21. sdm

    FMC-CE Breaks JTAG Chain

    I've got the FMC-CE board plugged into a ZC706, and when I try to load open the Hardware Manager in Vivado, it finds my HW target, but there are no devices found. After a little digging I found that there is an FMC design rule that if you don't use the JTAG chain you need to tie the FMC TDI pin to the TDO pin. Looking at the schematic, this isn't done on the FMC-CE board. Both of these FMC pins (D30, D31) are disconnected. What's the best way to work around this to enable JTAG debug when this board is installed?
  22. The attached image is probably the easiest way to ask this question .. We want to program 6 devices all at the same time using 6 copies of a USB-JTAG device (as opposed to having once large JTAG chain). It looks like Impact / Vivado does not natively support this (it sees multiple dongles but only deal with them one at a time). Can we script something to load a BIT file on all 6 simultaneously? We currently have the XUP USB-JTAG Programming Cable but would switch to another one if this one can't do it. Thanks!
  23. Theo

    Damaged HS2 cable?

    I wonder if I have encountered the same issue as Mojy with my Digilent HS2 JTAG cable. I raise the question again because it looks like the question was answered, but by a private communication. I'm running Red Had Linux 7.4. I've installed the Adept Runtime and Utilities packages. Previously, running djtgcfg enum had listed the HS2 device. Now, it does not. However, the lsusb utility recognizes the device as Future Technology Devices International, Ltd FT232H Single HS USB-UART/FIFO IC I see that this is the bridge chip inside the HS2. I think Mojy's original assessment of lost EEPROM may be correct. Can you help? Thanks, Theo
  24. We have recently purchased a JTAG-SMT2 board in substitution of a JTAG-HS2 cable, in order to program a Microzed board with Xilinx Vivado. The same Windows machine that was working with JTAG-HS2 now recognizes the new device JTAG-SMT2 as "USB Serial Converter". We have tried some solutions in other forums, as using FTDIconfig, with no success. What is remarkable is that, when plugging the device, Windows 1st finds a "Digilent USB device", but then automatically installs a driver and it is converted into "USB Serial Converter".
  25. I have a system where I'm using 2 HS2 cables. One is used for SPI control and the other for Jtag. For my SPI interface, I have written a DLL using the ADEPT2 SDK, that allows me to specify the serial number of teh device to connect for SPI. Unfortunately both devices enumerate as device name "jtagHs2" and If I start my Xilinx Viivado Hardware manager before my SPI interface, the Vivado is taking over the device I want to use for SPI. If I start my spi interface first then vivado correctly picks up the HS2 I want to use for JTAG. Is there a way to prevent this, for example can I change the name "jtagHS2" in my SPI interface eeprom? Thanks, Patrick