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Found 93 results

  1. JTAG-USB-FTDI

    JTAG-USB Question

    I am interfacing between a USB IC (a FT2232H FTDI chip) and a EEPROM IC (a 93AA56BT). To make the FTDI chip recognizable by Xilinx tools I need licensed Digilent Serial Numbers. How can I get a licensed serial number file to enable a USB-JTAG FTDI interface? Are these licenses keyed specifically to your chips? How can I enable a JTAG-USB FTDI interface?
  2. Dear friends, We have intended to use the JTAG-SMT3-NC module for both FPGA and ARM MCU programming. Our planned configuration is channel A for FPGA programming and channel B for ARM MCU programming. Do you please notify us if we are capable to perform the above work or not? Also, can we configure as JTAG the both channels (A and B)of the JTAG-SMT3-NC module with FT_PROG software. If not, please advise the solution. Also you can submit your tender to eliminate this difficulty. Attached please find the our working configuration. Wait for your response. Sincerely yours,
  3. Hi, I'm using JTAG-SMT3-NC for JTAG and UART on a custom board. One of the boards has a very strange behavior when sending UART serial to the board. The character 'U' doesn't work, but all other keys work fine. Digging into it a bit further, I can see with a scope that the UART signal is incorrect for the letter 'U'. Please see attached scope plot. The upper (white) trace is when the 'U' key is pressed. Please compare this to the lower (yellow) is the 'A' key. Manually decoding, the 'A' waveform is correct (0x41), but the 'U' is incorrect (0xd5 instead of 0x55). A few other notes: Same behavior on two totally separate laptops (windows10) Same behavior at different baud rates. 115200 baud, 1N8 normally used. The 'U' key works as expected on ~10 other boards we used. Seems like something "happened" with this one. All other letters appear correct, and have their MSB cleared. Could anyone think what might cause this behavior? UART trace U vs A.bmp
  4. greg751

    CMOD S6 JTAG

    HI everybody, Did anybody suceed to program CMOD S6 thanks to the JTAG header ? I'm trying desperatly to initiate the JTAG chain without any success ! With I used the USB connexion, it works perfectly. I wanted to try the platform cable USB from Xilinx to configure the FPGA like shown on the following picture : I got the following error : There is something that "puzzles" me in the CMOD S6's schematic... I put the parts of the schematic concerned by my interrogations in the attached file (PDF). I noticed that there are physical links between J4 header, IC3A (Atmel) and IC5A (FPGA) for the following signals : TDI-FPGA TDO-FPGA TCK BUT regarding the TMS signal, there is a physical connexion only between the IC3A (Atmel) and the IC5A (FPGA). On the J4 header, the signal that should be TMS, is called ISP-Reset. This signal is kept at 3.3V thanks a pull-up resistor and goes into the IC3D. I used an oscilloscope to observe the TMS signal (during the Initalization JTAG chain phase) on IC5A (FPGA) in two different cases : 1°) by using the on board USB => the TMS signal changed 2°) by using the paltform Cable USB 2 => the ISP-reset signal changed BUT the TMS signal did not change... In both the cases TDI-FPGA, TDO-FPGA and TCK changed This could (maybe) explain why it is not possible to configure the FPGA directly by the JTAG header... Does anyone have an explanation about this issue ? Thanks a lot, Kind regards, Greg. cmods6_Partial_Sch.pdf
  5. Hello all: we are using FT2232H on our boards to emulate the JTAG cable such it is recognized by Xilinx tools, ISE and Vivado. The most convenient solution is to use the Digilent driver which is already provided with Xilinx tools. I wonder what is the exact configuration of the FT2232H to enable using this driver? Could you please share the details? Thank you, Wojtek SkuTek Instrumentation
  6. I have a Z-Turn FPGA, based around a Xilinx Zynq 7020. Unfortunately, its JTAG port is 2x7 with 2.54mm pitch. I just realized the HS3 uses 2.00mm pitch. Is there a recommended way to convert the pin pitch? I designed my own board, but an existing option would be more convenient.
  7. Klavs

    JTAG-HS3 FTDI_PROG erase

    Hi, Managed to reprogram the JTAG-HS3 by accident, when it was connected together to the PC with another FTDI product that was meant to be reprogrammed. Vivado and Vitis does not recognize the cable anymore. Cannot find the original eeprom content anywere on the NET too. Could some one please help with this problem?
  8. hi I would like to buy an JTAG EMULATOR board, I have developed an environment which is able to send JTAG commands and parse the TDO received from the tested devise. My motivation is to validate my environment on an existing devise that support the JTAG protocol, and perform read /write operation to that devise. Thanks in advance. by the way... i have the HS2 devise, can it be used as JTAG client/slave? Ehud Eliav
  9. Chase

    JTAG-HS2 program issue

    Hi Digilent, I often got a information " The selected cable is being used by another application. Please retry the current operation. " from ISE iMPACT 14.7 when I used JTAG-HS2 device to program xilinx Spartan-6 device. But I did't use JTAG to do anything. I had make sure the driver is last. Does anyone have any idea? Thanks.
  10. Hello, I am trying to interact with my Basys 3 board through the JTAG port on the board but I am not sure what cable to use with it. The cables listed for sale that I've seen, like the JTAG-HS2, say that they are not needed for Digilent FPGA boards. Is there a cable that is intended for use with the FPGA boards? Thanks, Seth
  11. Hi, I have a brand new Digilent A7-35T board I tried to program via the USB built in JTAG using Vivado 2018.2. The part intermittently shows up in Hardware Manager, but a seconds later disconnects. Sometimes it disconnects just being connected (opened) in Hardware Manager and sometimes during programming. It is even worse if I try to erase and program the QSPI flash. I also downloaded and installed the latest Digilent Adept 2 with updated drivers and observed the same behavior. I tried different USB cables, different USB ports directly on my PC, via a powered hub, but the behavior is always the same -- it intermittently disconnects and fails. The amber LED does however stay lit. In Device Manager I am able to see the FTDI UART. I did also see it enumerate as a Microsoft BallPoint Mouse -- whatever that is. With this exact same setup, PC, Vivado, USB cables, etc, I have been programming the Zybo Z7-20 and the Arty boards with several designs without any such issues. Please let me know if I missed anything and what are the next steps in getting the board replaced or fixed. Thanks.
  12. Hi, We have a custom board which requires use of an FTDI FT4232H Quad HS USB-UART/FIFO IC chip (VID: 0403, PID: 6011). The JTAG interface is on channel A, SPI/I2C interface is configured for channel B, VCP on channel C, and GPIO on channel D. Is there any way we can enable Adept support for this FTDI part?
  13. Is there a way to stop generating the temporary files in below directory while accessing hw_server using Digilent cable. We are using Vivado 2018.3 to access the HW. Ø /tmp/digilent-adept2- Ø /dev/shm/diligent-adept2-* For some reason, few of these files appear to become “stuck” in the locked position on occasion which is what causes the below error: TCF 14:00:21.002: jtagpoll: cannot get port description list: ftdidb_lock failed: FTDMGR wasn't properly initialized TCF 14:00:21.012: jtagpoll: cannot get port description list: JTAG device enumeration failed: Initialization of the DPCOMM library failed. …above Errors are generate when hw_server was ran before Quick Search suggested a driver issue but if I delete the tmp files then it works fine. Any suggestions would be appreciated! Thanks HJ
  14. Hi - I just tried to install the XUP USB-JTAG Programming Cable from diligent. I also have a Diligent Programming Cable. Centos can see both cables (see below) Vivado can see the Diligent programming cable but not the Xilinx one. Given the physical constraints of the installation only the Xilinx one will work. Are there any specific instructions to get the Xilinx cable going? $lsusb | grep "Xilinx/|Future" Bus 002 Device 003: ID 03fd:000d Xilinx, Inc. Bus 001 Device 006: ID 0403:6014 Future Technology Devices International, Ltd FT232H Single HS USB-UART/FIFO IC
  15. Hello I have a Digilent USBJTAG HS2 and I'd really like to use it with TopJTAG's Probe software. The software has native support for the Digilent USB-JTAG but not the USB JTAG HS2. Having said that, it supports "custom" JTAG probes based on the FTDI chipset and recognises the HS2 as such. This is encouraging. When I select the Custom FTDI option it asks me to tell it what to do with the FTDI GPIOs and advises that different probed need their GPIOs setting up differently - often to enable buffers, drive tRST, and stuff like that. Sounds fair enough to me. The problem is that I cannot find documentation on how the GPIOs are used/configured on the HS2. The schematic would help, but the link to the schematic on the digilent website is dead. Can anyone help with the GPIO config or a schematic of the HS2? Many thanks. Andrew
  16. We are currently using the Digilent JTAG HS3 cable. Our setup does not allow enough room for the module without using a right angle connector from our FPGA board which has a 2x7 pin header. On the other end we have a Motherboard with a 4 pin USB header. I'm looking for advice thoughts on a simple solution to go from a our FPGA board with the 2x7 pin header which has little vertical space (so need a right angle connection) to the Motherboard 4 pin USB header. Maybe this can't be done with a single cable? Maybe it needs to be several separate parts (i.e., right angle connector + JTAG HS3 + USB cable)? Thank you!
  17. Hi All, Is there anybody have any experience about XUP (Xilinx University Program) USB-JTAG Programmer Revision-G using with Vivado 2015 or 2018? I have some little experience with Vivado 2015.5 and 2018.1 but regarding my experiences XUP USB-JTAG Programmer is not compatible with Vivado? I tried all ways on Centos-7 OS and the particular script (install_drivers.tar.gz). I aimed to program the Zedboard for petalinux applications developing but no success with XUP USB-JTAG Rev.G and Vivado running on Centos-7. Could you please share any suggestions if you have? Regards. Kursat Gol
  18. Does anyone know the OS/SW overhead when shifting JTAG bit chains from controller to device? For example, how long it takes to execute this function from the Adept SDK library? DjtgPutTmsTdiBits()
  19. Hi, We are going to purchase JTAG-USB Cable to debug our own developed chip. 2 questions here: 1. I assume this JTAG-USB Cable is able to auto-sense my VDD voltage level as long as it is within the range 1.8V ~ 5.0V. Is this correct? 2. We need this JTAG-USB Cable to do some configuration in our chip. Do I use "Digilent Adept Suite" or "Digilent AVR Device Programmer" to generate my JTAG signals/waveforms ? And one request: 1. I need a datasheet of JTAG-USB Cable datasheet if possible. Please advice, thank you. Tifei
  20. Hello everyone. I need to know the part number of the J10 USB UART connector integrated in ARTY-7 board. Best regards.
  21. anshumantech

    HS1 JTAG Circuit

    I want to know about the circuit diagram of HS1. Can anyone help me out with it? I searched on Digilent website too but it is currently unavailable there.
  22. I have been working on developing an I2c interface on the arty s7 board, and during one of my hardware tests, I noticed that my debug LED's had shut off. I went to resend my bit stream and noticed that my hardware manager was no longer connected to the device. Whenever I plug the device in, it is clear that I am getting power, as the done LED, the power LED, and the TX LED are all on. However, when I attempt to reset the device using either the reset or program button, no change occurs (that is, the strobing LED pattern does not commence as it has in the past). I have checked my device manager and found that the s7 is no longer connected, and have restarted my computer as well as unplugged and replugged the s7. My primary concern is that this may be a hardware issue, but I am unsure as to what I could have done to cause this. I have been running 3 3.3v pins from the arty to a teensy. Any advice would be helpful. Thanks, Micah
  23. Hello , I am working with Metaware IDE and the device uses Digilent HS2 JTAG cable. But there is a problem with the JTAG cable and I could not identify the issue. Kindly guide me with this. I have attached the picture of the error. Thanks
  24. Hello, I'm planning on buying the product "Cmod C2: Breadboardable CoolRunner-II CPLD Module" to make some prototypes of future designs. I saw that, in order to program its CPLD (XC2C64A), I need to buy a USB to JTAG cable. Is the Diligent's JTAG-HS1 programming cable compatible with that CPLD and board?. I will be using the last version of ISE on Windows 10, will it be a problem?. If it helps answering, this are the links of the Digilent's store of those products: Breadboardable CoolRunner-II: https://store.digilentinc.com/cmod-c2-breadboardable-coolrunner-ii-cpld-module/ JTAG-HS1 programming cable: https://store.digilentinc.com/jtag-hs1-programming-cable-limited-time/
  25. I just received my JTAG-HS3 Rev A programming cable and if I plug it into my windows 10 machine I don't see anything unique showing up in the device manager. I know something is popping on and off because I can hear the device attached and device detached sounds from windows. So what should it show up as?