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Showing results for tags 'ipcore'.
I'm trying to get the Pmod Color module for the Zynq z7-10 to work but it doesn't appear to be on. I was following along the instructions from these sites: https://reference.digilentinc.com/learn/programmable-logic/tutorials/pmod-ips/start https://projects.digilentinc.com/arthur-brown/displaying-color-readings-with-the-pmod-color-and-python-ebd794 and I have it connect to the device as such on the board's JA port: Following along with the first link, I skipped the steps where a clock and interrupt were added as the data sheet shows that the Pmod Color IP does not requi
Hello everyone, I’m a newbie on working on zedboard, and I want to use my Zedboard to communicate with Pmod MIC3 this time. I did a few researches about how to use the Pmod MIC3, and I think I found something useful in another post, link: https://forum.digilentinc.com/topic/19342-driver-code-for-pmod-acl2-and-pmod-mic3/ I’m really appreciate and thanks for their help, but unfortunately I still have no idea of how to make my Pmod MIC3 to run with my Zedboard. I know Pmod MIC3 is using SPI communication protocol and I read what SPI is, link: https://reference.digilentinc.com/learn/fund
Hello, I have issues with DDR4 ipcore design in PL part. Also I am using vivado 2019.2 version.I want to redesign and use DDR4 and I want to write and read huge data sets into the DDR4 in vivado as IPCORE but I could not find any resources about how can we create custom ddr4 ip core. Can you helo me about these issues as soon as possible? Thank you. Best Regards.
Hi, I am trying to compute FFT of a synthesized square wave of frequency 100Hz. The 100Hz signal has to be sampled at 1kHz. So, I kept the clock frequency of FIFO, FFT_IPcore and other blocks at 1ms. I have attached the screenshot of the design file and simulation results. From the simulation output, it can be observed that the buffer stores for 512 samples and the un-buffer after 512*1ms. But, there is no output from the FFT block. I would like to know whether my approach is correct or I am committing any mistake in the way the blocks have to be integrated. Help much app