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  1. Hello, I am trying to create an IP that reorders AXI DRAM addresses, similar to the one described in Xilinx xapp792. The main purpose is to change from Row/Bank/Column to Bank/Row/Column addressing. A portion of the block design where the IP will be used is attached. When I create this IP, it gets its own address space. However, it should only be a forwarder, like the axi interconnect. I know I should be setting some parameters in IP packager, but I don't know what those are. Can anyone help me out with this? Thanks, Rajat Rao