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Found 4 results

  1. SDK fatal error:xgpio.h no such file or directory I am using: Vivado 2016.4 Design Tools Windows10 on a Lenovo Ideapad Zybo dev. board with the Zynq7020 While following the first exercise in The Zynq Book Tutorial. I encountered several errors but they seemed harmless enough since I was able to successfully create and export a bitstream. But now I am wondering if those warning and errors from the IP Integrator stage is causing my inability to build the project LED_test_tut_C.c code in the SDK, receiving fatal error:xgpio.h:No such file or directory. When lo
  2. Hi, I would like to know what IO standard would I use if I want to input a differential signal to two adjacent PMOD headers on PMOD JB. This differential signal will be an input to a buffer on the FPGA. The current xdc file on github uses LVCMOS33 as a default standard as shown below. set_property -dict { PACKAGE_PIN E15 IOSTANDARD LVCMOS33 } [get_ports { Input_data }]; #IO_L11P_T1_SRCC_15 Sch=jb_p[1] set_property -dict { PACKAGE_PIN E16 IOSTANDARD LVCMOS33 } [get_ports { Input_data }]; #IO_L11N_T1_SRCC_15 Sch=jb_n[1] Would it be fine if I use LVCMOS33 or should I use anot
  3. Hello everyone, I'm migrating my ancient project from the Nexys2 to the Nexys Video, in UCF, the Hirose FX2 signals on the Nexys2 were declared as LVTTL I/O standards, while the FMC signals are declared as LVCMOS in the XDC files provided on the Digilent Resource Center. After doing some researches, I know that LVTTL and LVCMOS differ by their input voltages. In the paragraph of Power Supplies in datasheet of the Nexys Video, il mentions " An FPGA design can dynamically change the VADJ voltage to suit a certain FMC mezzanine card or application. Care must be taken to disable the re
  4. I'm having problems with IOSTANDARD specifications on the PMOD ports of the ZYBO. My design utilizes most of the PMOD ports, namely JB-JE, and on one of the ports I want to output a 2.5V LVCMOS signal (named "Sync"). The other signals are all 3.3V LVCMOS. Trying to implement this on the ZYBO yeilds the following message: [Place 30-58] IO placement is infeasible. Number of unplaced terminals (1) is greater than number of available sites (0). The following Groups of I/O terminals have not sufficient capacity: IO Group: 1 with : SioStd: LVCMOS25 VCCO = 2.5 Termination: 0 TermDir