Search the Community

Showing results for tags 'incremental encoder interface'.



More search options

  • Search By Tags

    Type tags separated by commas.
  • Search By Author

Content Type


Forums

  • News
    • New Users Introduction
    • Announcements
  • Digilent Technical Forums
    • FPGA
    • Digilent Microcontroller Boards
    • Non-Digilent Microcontrollers
    • Add-on Boards
    • Scopes & Instruments
    • LabVIEW
    • FRC
    • Other
  • General Discussion
    • Project Vault
    • Learn
    • Suggestions & Feedback
    • Buy, Sell, Trade
    • Sales Questions
    • Off Topic
    • Educators
    • Technical Based Off-Topic Discussions

Find results in...

Find results that contain...


Date Created

  • Start

    End


Last Updated

  • Start

    End


Filter by number of...

Joined

  • Start

    End


Group


AIM


MSN


Website URL


ICQ


Yahoo


Jabber


Skype


Location


Interests

Found 1 result

  1. Hello! Me and my colleagues want to do a project and we are thinking about using one of the various development boards with Zynq-7000 for that purpose. Basically we just want to sample and measure some signals and transfer them to a PC (preferably via gigabit-ethernet) for evaluation. So the Zynq would have to do a real-time hardware-in-the-loop task. The signals we want to measure are as follows: 3 analog signals sampled @ 1 kHz by an ADC 3 analog signals sampled @ 100 kHz by an ADC 2 incremental encoders the frequency of a quadrature pulse signal (we would need a pin for edge-detection and a counter that counts the time between the edges) However, the documentation of those Zynq-7000 development boards on the internet is quite poor. In most hardware user guides I only found that the Zynq-7000 only has the XADC which is dual, but we would need to sample 6 different signals. I have neither found any support for incremental encoder interfaces, nor any GPIOs that are capable of accessing a software timer for edge-detection. In the Xilinx forum somebody recommended using the PYNQ-Z1 but I do not know how freely you can program the Zynq-7000 with Python. As I said, we would need at least two interfaces for incremental encoders and I have seen some examples how to implement this on an FPGA. But those examples always included coding in VHDL. Is it possible to program the Zynq-7000 in Python with the same degree of freedom as in VHDL? Which development board (and maybe additional boards/cards) would you suggest to use and why? Best regards!