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Showing results for tags 'ibert'.
I need to use the IBERT IP core on a Genesys-2 FPGA board. I am using FMC-SMA board to convert FMC into SMA. In the clock settings I am using the external clock source from pin AD-11/12 of 200MHz. But the problem is I am unable to get any output as PLLs are not locked. I had followed the same steps with FMC board and all things where working fine. 1. Can I use the internal clock in the clock setting. (I tried but getting the INFO:- [Labtools 27-1434] Device xc7k325t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it. ) 2. Do I n
Hello! I am working on implementing the IBERT IP core on the Genesys2 dev board. I have purchased this daughter board to connect to the FMC, but I am unsure of how the pins relate to the SMA connectors. Has anyone used this daughter board before? I have emailed Hitech Global for documentation, but I have not received a response as of yet. Also, does anyone know if a guide such as this one exists for the Genesys2 board? I assume that the steps would be very similar since they both use the Kintex-7 FPGA. Thanks