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Found 7 results

  1. Hello everyone! I am a FPGA rookie programmer and I have recently bought an Arty Z7-20 board for a university project. I intended to write a simple RTL HDMI transmitter with TMDS encoder. However, I found difficulties in implementing the design on the target FPGA, although all simulations I run on Vivado stated the correct top-module behavior. I also tried to implement the Diglilent official HDMI out demo for Z7-20 package but it did not work neither. Any suggestions ? I am sharing all my project's files attached to this post. Thanks in advance to everyone which will provide any help. P.S
  2. I'm following along with the instruction provided on the GitHub (https://github.com/Digilent/Zybo-Z7-10-HDMI/blob/master/README.md) to test the functionality of the Zybo board's HDMI ports. I followed the instruction to the T but cannot seem to get a signal to pass through. At first, I connected my cable box to the HDMI Rx and then I switched to my laptop. In both instances, not only did my TV monitor not detect a signal, but the output on the sdk terminal was that the HDMI-in was unplugged (see first attached photo). The HDP / LD9 LED near the HDMI port turns on, telling me it is detecting a
  3. Hello Digilent team, I was able to integrate the bare metal HDMI out on Arty-Z7-20 thanks to your demo from here: https://github.com/Digilent/Arty-Z7-20-hdmi-out/tree/v2020.1 I wonder if you have any plan to make a petalinux version for it with HDMI output integrated on Xilinx toolchain v2020.1? If not yet, do you know where can I start? I don't see documents from Xilinx developing from scratch like this. I found a similar post here but for v2017.v: Looking forward for your advices. Thanks and best regards,
  4. this project to be specific. Are there any pitfalls I should avoid? https://reference.digilentinc.com/learn/programmable-logic/tutorials/arty-z7-hdmi-demo/start
  5. hi all, i want want to measure a voltage with the zybo and display the measured values on a screen via hdmi output. i used the hdmi passthrough projent as a start and got that working fine. know when i added the adc in vivado i get the error that the Vccs on bank 35 are incompatibele because the hdmi used 3.3V and the adc uses 1.8V. but when i look in the schematic under synthesis and look and the i/o ports i see that the hdmi aslo uses 1.8V. so why is it a problem when the adc needs 1.8V but when the hdmi needs 1.8V it works just fine.
  6. Hi, i want to take video stream from Usb camera and show via HDMI. How can i make block design. Can you help me ? King Regards
  7. Bonjour, je travail cette période sur le hdmi_out de la carte fpga arty z7-20, et comme tout le monde j'ai commencé par télécharger le fichier tuto de .git, deja apres l'implémentation y a rien qui s'affiche sur le deuxieme écran donc j'ai essayé de modifier les blocs IP par l'ajout d'un bloc qui convertit une image à une matrice et le lié avec le reste des blocs en appliquant les modifications nécessaires sur le BD et le .vhd , finalement, j'ai obtenue cette erreur. Remarque à savoir : j'ai vérifié les liaisons en RTL design et elles me paraits correctes MErci pou