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Found 1 result

  1. askhunter

    hdmi ip clocking error

    Hi,I got this error. The old version also didn't have such a problem (I think 2016). I'll be happy if you can help me. note: board Arty z7 20 ## This file is a general .xdc for the ARTY Z7-20 Rev.B ## To use it in a project: ## - uncomment the lines corresponding to used pins ## - rename the used ports (in each line, after get_ports) according to the top level signal names in the project ## Clock Signal set_property -dict { PACKAGE_PIN H16 IOSTANDARD LVCMOS33 } [get_ports { sys_clock }]; #IO_L13P_T2_MRCC_35 Sch=SYSCLK create_clock -add -name sys_clk_pin -period 8.00 -waveform {0 4} [get_ports { sys_clock }]; ##Buttons set_property -dict { PACKAGE_PIN D19 IOSTANDARD LVCMOS33 } [get_ports { rst }]; #IO_L4P_T0_35 Sch=btn[0] set_property -dict { PACKAGE_PIN R14 IOSTANDARD LVCMOS33 } [get_ports { led0 }]; #IO_L6N_T0_VREF_34 Sch=LED0 set_property -dict { PACKAGE_PIN P14 IOSTANDARD LVCMOS33 } [get_ports { led1 }]; #IO_L6P_T0_34 Sch=LED1 set_property -dict { PACKAGE_PIN N16 IOSTANDARD LVCMOS33 } [get_ports { led2 }]; #IO_L21N_T3_DQS_AD14N_35 Sch=LED2 set_property -dict { PACKAGE_PIN M14 IOSTANDARD LVCMOS33 } [get_ports { led3 }]; #IO_L23P_T3_35 Sch=LED3 ##HDMI RX Signals #set_property -dict { PACKAGE_PIN H17 IOSTANDARD LVCMOS33 } [get_ports { hdmi_rx_cec }]; #IO_L13N_T2_MRCC_35 Sch=HDMI_RX_CEC set_property -dict { PACKAGE_PIN P19 IOSTANDARD TMDS_33 } [get_ports { TMDS_clk_n }]; #IO_L13N_T2_MRCC_34 Sch=HDMI_RX_CLK_N set_property -dict { PACKAGE_PIN N18 IOSTANDARD TMDS_33 } [get_ports { TMDS_clk_p }]; #IO_L13P_T2_MRCC_34 Sch=HDMI_RX_CLK_P set_property -dict { PACKAGE_PIN W20 IOSTANDARD TMDS_33 } [get_ports { TMDS_data_n[0]}]; #IO_L16N_T2_34 Sch=HDMI_RX_D0_N set_property -dict { PACKAGE_PIN V20 IOSTANDARD TMDS_33 } [get_ports { TMDS_data_p[0]}]; #IO_L16P_T2_34 Sch=HDMI_RX_D0_P set_property -dict { PACKAGE_PIN U20 IOSTANDARD TMDS_33 } [get_ports { TMDS_data_n[1]}]; #IO_L15N_T2_DQS_34 Sch=HDMI_RX_D1_N set_property -dict { PACKAGE_PIN T20 IOSTANDARD TMDS_33 } [get_ports { TMDS_data_p[1]}]; #IO_L15P_T2_DQS_34 Sch=HDMI_RX_D1_P set_property -dict { PACKAGE_PIN P20 IOSTANDARD TMDS_33 } [get_ports { TMDS_data_n[2]}]; #IO_L14N_T2_SRCC_34 Sch=HDMI_RX_D2_N set_property -dict { PACKAGE_PIN N20 IOSTANDARD TMDS_33 } [get_ports { TMDS_data_p[2]}]; #IO_L14P_T2_SRCC_34 Sch=HDMI_RX_D2_P set_property -dict { PACKAGE_PIN T19 IOSTANDARD LVCMOS33 } [get_ports { hdmi_in_hpd}]; #IO_25_34 Sch=HDMI_RX_HPD set_property -dict { PACKAGE_PIN U14 IOSTANDARD LVCMOS33 } [get_ports { DDC_scl_io }]; #IO_L11P_T1_SRCC_34 Sch=HDMI_RX_SCL set_property -dict { PACKAGE_PIN U15 IOSTANDARD LVCMOS33 } [get_ports { DDC_sda_io }]; #IO_L11N_T1_SRCC_34 Sch=HDMI_RX_SDA ##HDMI TX Signals #set_property -dict { PACKAGE_PIN G15 IOSTANDARD LVCMOS33 } [get_ports { hdmi_tx_cec }]; #IO_L19N_T3_VREF_35 Sch=HDMI_TX_CEC set_property -dict { PACKAGE_PIN L17 IOSTANDARD TMDS_33 } [get_ports { TMDS_1_clk_n }]; #IO_L11N_T1_SRCC_35 Sch=HDMI_TX_CLK_N set_property -dict { PACKAGE_PIN L16 IOSTANDARD TMDS_33 } [get_ports { TMDS_1_clk_p }]; #IO_L11P_T1_SRCC_35 Sch=HDMI_TX_CLK_P set_property -dict { PACKAGE_PIN K18 IOSTANDARD TMDS_33 } [get_ports { TMDS_1_data_n[0] }]; #IO_L12N_T1_MRCC_35 Sch=HDMI_TX_D0_N set_property -dict { PACKAGE_PIN K17 IOSTANDARD TMDS_33 } [get_ports { TMDS_1_data_p[0] }]; #IO_L12P_T1_MRCC_35 Sch=HDMI_TX_D0_P set_property -dict { PACKAGE_PIN J19 IOSTANDARD TMDS_33 } [get_ports { TMDS_1_data_n[1] }]; #IO_L10N_T1_AD11N_35 Sch=HDMI_TX_D1_N set_property -dict { PACKAGE_PIN K19 IOSTANDARD TMDS_33 } [get_ports { TMDS_1_data_p[1] }]; #IO_L10P_T1_AD11P_35 Sch=HDMI_TX_D1_P set_property -dict { PACKAGE_PIN H18 IOSTANDARD TMDS_33 } [get_ports { TMDS_1_data_n[2] }]; #IO_L14N_T2_AD4N_SRCC_35 Sch=HDMI_TX_D2_N set_property -dict { PACKAGE_PIN J18 IOSTANDARD TMDS_33 } [get_ports { TMDS_1_data_p[2] }]; #IO_L14P_T2_AD4P_SRCC_35 Sch=HDMI_TX_D2_P