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Showing results for tags 'gtp'.
I noticed that the FPGA used on the ARTY (CSG324) does not appear to have any of the GTP transceivers bonded. The FPGA used on the Basys3 (CPG236) looks to have (2) GTP transceivers bonded? This seems odd because Xilinx advertises them in quads, and doesn't mention anything about that specific package in the pinout documentation (see page 30 of Artix-7 pinout PDF, too large to upload). 1) Has anyone tried using these transceivers on the Basys3? Perhaps through a PMOD interface? 2) Is there a MRCC or SRCC pin available on one of the PMOD which is in the same clock region as one