Search the Community

Showing results for tags 'example'.

  • Search By Tags

    Type tags separated by commas.
  • Search By Author

Content Type


Forums

  • News
    • New Users Introduction
    • Announcements
  • Digilent Technical Forums
    • FPGA
    • Digilent Microcontroller Boards
    • Non-Digilent Microcontrollers
    • Add-on Boards
    • Scopes & Instruments and the WaveForms software
    • LabVIEW
    • FRC
    • Other
  • General Discussion
    • Project Vault
    • Learn
    • Suggestions & Feedback
    • Buy, Sell, Trade
    • Sales Questions
    • Off Topic
    • Educators
    • Technical Based Off-Topic Discussions

Find results in...

Find results that contain...


Date Created

  • Start

    End


Last Updated

  • Start

    End


Filter by number of...

Joined

  • Start

    End


Group


AIM


MSN


Website URL


ICQ


Yahoo


Jabber


Skype


Location


Interests

Found 6 results

  1. Hello All, I am having an issue with running the Master Polled example on I2C with the zynq. I have a base design that is set up and runs the self test and repeated start examples and completes them. My issue is that I hooked up an I2C sensor, added pullup resistors, and it is failing. The only thing I have changed in SDK is that I have found the address of my I2C sensor, 0x57, and put it in place of 0x55. I can place my block design and what not here for referencing. Update - I have assigned I2C pins to W19 and W20 to SCL and SDA respectively.
  2. I am trying to run the xilinx example project xemacps_example_intr_dma (example) on baremetal zynq. I have tried copy pasting requisite files into a project and having it build by importing the example through the .mss file of the bsp. The hardware export is from a slightly modified version of the digilent getting started example using the master xdc file. The project compiles and loads but never enters the interrupt handler and gets hung at the while(!FramesRx) at line 819. My block diagram has a fixed io pin from the zynq ps running over to an external interface pin labeled fixed io whi
  3. zoggx003

    Zybo DMA example

    I downloaded the ZYBO-master from the github, and ran the tcl script from the following directory: C:\Zynq_Book\ZYBO-master\ZYBO-master\Projects\dma\proj. Could the tcl files have been mixed up or misplaced? Has anyone fIgured out how to fix this? this is the error that I get: ERROR: [IP_Flow 19-3461] Value 'hdmi_in_ddc' is out of the range for parameter 'IIC Board Interface(IIC_BOARD_INTERFACE)' for BD Cell 'axi_iic_0' . Valid values are - Custom INFO: [IP_Flow 19-3438] Customization errors found on 'axi_iic_0'. Restoring to previous valid configuration. INFO: [Co
  4. Good afternoon I am learning to use VHDL. I have a Nexys 4 ddr and a PmodSD card, that I would like to learn to use. I downloaded the most recent version of VIVADO, and Xilinx as well. Do you all have a program that I can use, to see how it works or a tutorial to process images? I would appreciate it. Thank you. Kind regards.
  5. Hey there, I've just begun work on a stereo-imaging project using the VmodCam and Atlys FPGA. When I started my research into the project it seemed like there were plenty of reference projects to download from diligent's page for the VmodCam. However, now that I have got to the stage where I would like to use that resource it seems the site has change and the reference projects have gone. Could anyone point me in the right direction, I just wanna get started on this project!
  6. Hello, noob here I just started a project for my university BEng and is based on the chipKit WiFire provided by my supervisor. So far, i felt in love wth MPIDE because is so easy to use and it has all ready for me with 1 exception. The Flowcloud library. For the first 2 months and so I just figured out how to use MPIDE because the boards were from flowcloud so the USB-to-serial cable didn't work so I burned the Bootloader with Digilent's firmware. But now, I lost the Flowcloud app from the PIC chip that my project depends on so much because is required to use a cloud service. Anyhow, my requ