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Found 8 results

  1. 'm an enthusiast looking to mainly work with digital and maybe occassionally on minor Analog Circuits as well. I was considering getting the Analog Discovery 2, but since my primary focus is digital someone recommended me the Salea over the AD2. I was told that the sample buffer in the AD2 is outdated and too small for anything useful. On the other hand even though I didn't get an exact number for this on the Salea, they seem to offer direct streaming to PC memory therefore limited only by the amount of RAM. Can someone please clarify if AD2 suffers from this limitation or if it has direct streaming support as well through Waveforms? Are there any workarounds for the small sample buffer? Thanks for reading.
  2. ATIF JAVED

    ADC DAC SELECTION

    I want to interface DAC and ADC with some fpga evaluation board My requirement of ADC and DAC is following DAC input ->sampling_rate=2MS/s frequency=455khz ADC Input ->Signal bandwidth=400khz i have no problem of resolution So someone please guide me or refer me some models of adc and dac along with some FPGA evaluation board that complete my requirements . Also refer me if anyone know about some board that have build in adc dac along with FPGA Any kind of help in this regard would be much appreciable
  3. sccarey

    5 Mbit streaming to PC

    Howdy, I'm looking for a device that can read a 5 Mbit NRZ pseudorandom digital stream (pn15) and stream it via USB in real time. I've thought of using a standard serial to USB converter, but I don't think it would work because there are no sync bits. I think the only way to really capture the bits would be to over-sample (>10 MS/sec) and then fit a clock to the serial signal. I'm sure the Analog Discovery could do this with its 100MS/sec sample rate, but I'm looking for something that could stream it in real time. I think I've read that the real time limit is 1-2 MS/sec, but I'm wondering if it would be faster since I'd only have to stream digital samples. I'm willing to write some code if the functionality is exposed in the API. Any information would be greatly appreciated. Thanks, Sam
  4. Hello, I have found this topic with script for counting edges of digital signals and I wonder if it's possible to modify it somehow (or use completely different approach) to read quadrature encoder signals with Analog Discovery? Most important thing, I think, is that I have to compare signals state at current event (i.e. I have "1" on signal A and need to know what is the state of B signal in that particular moment) and be able to compare it with previous state (event) to decide if I should increment or decrement my counter. And it should be triggered with both edges but I assume that trigger options on DIO line decides when events are generated. Is it possible to capture and count edges without sample count limit? I mean something like hardware triggering on digital inputs instead of starting on first trigger and sampling defined number of samples with defined frequency (Stream mode). At the moment it looks more like signals recording and post-processing (offline) and I wonder if it is possible online to execute encoder script live on each trigger? It's not a must but would be nice And one more thing - I have downgraded my WaveForms to version from mentioned topic because in newer version there is no Stream mode. Was it renamed or replaced by something better?
  5. Hello everyone, I want to use the analogue discovery for a continuous sampling task. I'm relatively new to the Analogue Discovery, so maybe this is a rather simple question. To really perform continuous sampling i want to use the "acqmodeScanShift" acquisition mode, but the Reference Manual states that in this mode the trigger setting is ignored. Without trigger, is it possible to sample an analogue in and digital in synchronously in acqmodeScanShift mode? This is really mandatory for my application. Thank you for your help!
  6. I try to receive data with an Analog Discovery Kit (AD) from a FPGA written with my own protocol. Three signals enter the AD: Clock, Trigger, and Data. At the rising edge of the trigger, I would like to sample 16 bits from the data synchronous to the clock (around 20 Mhz). How can this be done with an AD and SDK? With an FPGA writing this is a matter of minutes, but some how I cannot wrap my head around this. Below is the code I am using, but sadly it returns only 0x0000 or 0x000. How to receive data in this way? Cheer, VonPuffelen FDwfDigitalInConfigure(AnalogDiscoveryHandle, false, true); // start sampling STS sts; unsigned int timer = 0;// wait for receiving do{ if(!FDwfDigitalInStatus(AnalogDiscoveryHandle, true, &sts)) // pull for trigger event { printf("AcquireErro(42)"); return 42; } timer++; }while((sts != stsDone) && (timer < 0x1FFF)); FDwfDigitalInStatusData(AnalogDiscoveryHandle, data, length*sizeof(unsigned short)); // fetch data from IO buffer. FDwfDigitalInConfigure(AnalogDiscoveryHandle, false, false); // stop sampling
  7. Hello, I am using a NEXYS 4 DDR and I am acquiring some data with the ADC that has this card, I want to implement a filter to eliminate the noise. Someone has an example in VHDL. Thank you.
  8. mschambe

    Digital Discovery

    Can the Digital Discovery logic analyzer be configured for state analysis? Specifically, can you designate one of the IO's as an input clock source and choose the appropriate edge for capturing data?