Search the Community

Showing results for tags 'digital discovery'.

More search options

  • Search By Tags

    Type tags separated by commas.
  • Search By Author

Content Type


  • News
    • New Users Introduction
    • Announcements
  • Digilent Technical Forums
    • FPGA
    • Digilent Microcontroller Boards
    • Non-Digilent Microcontrollers
    • Add-on Boards
    • Scopes & Instruments
    • LabVIEW
    • Other
  • General Discussion
    • Project Vault
    • Learn
    • Suggestions & Feedback
    • Buy, Sell, Trade
    • Sales Questions
    • Off Topic
    • Educators
    • Technical Based Off-Topic Discussions


  • Community Calendar

Found 7 results

  1. I'm using the sync mode, triggered by the pattern generator. My config is one 14 bit counter (DIO24-DIO37), and a clock on a single signal (DIO38). The logic analyzer is configured to sample DIN0-DIN7 on the rising flank of DIO20 (which I connected to DIO38). But I'm missing the first 8 samples. How do I know? The device-under-test is a ROM and I already know its contents. I actually get the correct values when the counter on the pattern generator wrap around and starts again. I verified with a scope that the generated pattern is correct (so the sample clock starts at the correct time). Is this a bug in WaveForms or do I need to configure some special? (On that note: it would be nice when I could restrict the pattern generator to one single run on the counter instead of being time-based)
  2. Emulate I2C slave

    Would it be possible to emulate a I2C slave using the digital discovery (using scripting)? If not, is this something that could potentially be added in the future, or are there any HW limitations that make this infeasible?
  3. Phantom logic in DD

    On one of my first attempts to use a DD, I captured a display showing several "phantom" transitions. (See below, and attached) I call these "phantom" transitions because when I zoomed in on any of these, they vanished. You can see many of these just left of the 0.35ms line. However, there are many others scattered throughout the plot. For example, the DIO30 line shows a very slow logic waveform--with super fast phantom transitions on it as well. In general, most of these phantom transitions are very narrow. However, there are some larger and thicker phantoms. For example, if you look at the "PP-CLK" trace, just after 0.98ms, there is a simple rise and fall. However, the rise is thicker than the fall, even though there are no extra transitions there. Dan
  4. Hi, I'm a happy AD II user and am also looking at the DD. One of my colleagues who does a lot of video work was asking if the DD could do synchronous capture, clocked by the DUT, rather than just async sampling. He thought that this might just be a firmware change as the hardware should already support this.. Have Digilent had any thoughts on synchronous capture? Thanks
  5. Getting acquainted with WaveForms and my new Digital Discovery. I'm looking at SPI signals and see gray blocks in the signal plots. (See enclosed images.) What is the significance of these blocks? Too fast oscillation vs sampling rate? However, mouse-over doesn't show any change in values across the block. Sorry if this is an obvious question. Thanks for any input. Staale Overview: Same grid, max zoom:
  6. Hi, I'm trying to measure the input impedance of my AD2 Logic analyzer and compare it to my new Digital Discovery impedance. My measurement is around 650 KΩ for the DD, however, I couldn't get any consistent result for the AD2 nor AD1. The input impedance varies between 30 MΩ and 70 MΩ. I used different techniques in my measurements, but with no success. I also looked the specs of D2/AD1 and couldn't find a figure for the Logic analyzer input impedance. Can someone please, help me find an answer or suggest a technique to measure the Logic analyzer input impedance? Thanks
  7. So, I just received my Digital Discovery earlier this week. I've actually got a project coming up where I'll be able to make use of it, so thought I'd familiarize myself with the differences between it and the Analog Discovery. I proceeded to walk through the protocol tutorial that uses the ALS PMOD to demonstrate SPI interaction. I had never tried this with the AD2, and figured it would be a good test. Unfortunately, after checking my work multiple times, I was still only getting back 0 signals. Thinking the problem could be the DD, I tried the same thing on the AD2 with the same results. After scratching my head a few times, it occurred to me that the prescribed pin assignments looked strange. The tutorial says CS is assigned clock, and SCK is assigned to select. I went and double checked my hunch in the ALS docs, and indeed there was the problem. The tutorial incorrectly swaps these two pins. CS is (chip) select, and SCK is (serial) clock. Once I swapped the pins, all was well. Just and FYI for the content team and others who might face the same issue. Dave