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Found 4 results

  1. Hi, Actually i want to generate the device tree for the Zedboard.So on the way of doing this i found one prebuilt device tree for the Zedboard which is having following line :- chosen { bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 rw earlyprintk rootfstype=ext2 rootwait devtmpfs.mount=0 consoleblank=0"; linux,stdout-path = "/[email protected]/[email protected]"; } ; After following some tutorials i got some idead about .dts file contents but still i did not get the meaaning of each word in above lines. Also in some other .dts files from other sourc
  2. Hi, Following is the snippet from the device tree for the MicroZed Board. [email protected] { #address-cells = <0x2>; #interrupt-cells = <0x3>; #size-cells = <0x1>; compatible = "arm,cortex-a9-gic", "arm,gic"; interrupt-controller; num_cpus = <0x2>; num_interrupts = <0x60>; reg = <0xf8f01000 0x1000 0xf8f00100 0x100>; xlnx,irq-f2p-mode = "REVERSE"; linux,phandle = <0x3>; phandle = <
  3. Hi all, I am about to run Linux on a Zybo. In the tuto I am following, this is explained I have to generate a device tree after defining the hw with no mention about any Linux drivers. But I think this is not the only thing I have to do to make Linux able to communicate with the peripherals on the board. Tell me if I am wrong : the device tree is just there to tell the kernel how peripherals are mapped in memory. But it does not tell nothing about how to communicate with. This is the role of the driver. Right? If right, will it be fine if I generate the device tree and if I use
  4. Hi all, I have a Zynq -7000 development board and am using Vivado 2014.4. I have a block design that successfully synthesizes and generates a bitstream. My design uses Xilinx's VDMA core, and I want to use the Xilinx's VDMA driver with it (http://www.wiki.xilinx.com/DMA+Drivers+-+Soft+IPs#AXI VDMA). The driver guide says "The device tree node for AXI VDMA will be automatically generated, if the core is configured in the HW design, using the Device Tree BSP." However, I am having trouble generating a device tree for the design. I have been referencing this http://www.wiki.xilinx.com/Build+Devi