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Found 16 results

  1. Hello, I have been trying for a while to run this PCAM 5c demo example that is provided by Digilent on a Zybo z7-20 board: https://github.com/Digilent/Zybo-Z7-20-pcam-5c The demo uses Vivado 2018.2 version, however I have been trying to execute it on the 2019.1 version. I am very new to FPGA and VHDL. I followed all the steps mentioned in the demo perfectly and did not receive any error. Although, after opening the project in the 3rd step, a pop-up window informs that the project is of the older version and I checked the option of automatically upgrading the project to current version. After the project opens, there is another pop-up to Report IP, I tried both the options individually i.e. Report IP and Ignore. It did not give any error in any of the following steps. But, the screen displays just a moving colour pattern and I am not able to communicate to camera module via UART as suggested in the demo. To summarise, all the steps mentioned in the demo were performed but the camera module is not working. I am unable to see the UART communication channel. I also tried following the instructions to use digilent github demo projects: https://reference.digilentinc.com/learn/programmable-logic/tutorials/github-demos/start However, this uses the 2016.4 version. I used the SDK Handoff method and again faced the same problem. Kindly suggest possible solutions to make this demo work on 2019.1 version or tell me what have I been doing wrong. Thanks.
  2. Hi FPGA Gurus ! This thread is dedicated to the (probably numerous) questions I might have about the Atlys HDMI demo. It will be edited each time a question is answered or another question pops up ! =) Question 1: I dont understand the calculation of the Frame Base Address in hdmi_demo.h. The code reads : /* * These constants refer to the configuration of the hdmi_out core parameters. */ #define pFrame 0x49000000 //frame base address #define xcoFrameMax 1280 //frame width #define ycoFrameMax 720 //frame height #define lLineStride 0x800 //line stride Now, if I look at the hdmi_out core, i'm ok about frame width and height and also about the line stride. However, the core FRAME BASE ADDRESS parameter is set to 0xD1000000. If I look at the MPMC configuration, its base address parameter is set to 0x48000000. I'm a bit confused. Could someone explain how this 0x49000000 value is obtained out of 0x48000000 and 0xD1000000 ? Thank you very much for your help
  3. I'm trying to run the Zybo Z7 Pcam 5C Demo... i'm really new at this, the instructions say: ********************************************************** To generate the project: 1. Open Vivado 2017.4 2. In the tcl console, type "cd [this directory]/proj" and press enter. 3. Type "source ./create_project.tcl" and press enter to generate the block design for the project. To run the demo from SD card: 1. Copy bin/BOOT.bin to the root of your SD card. 2. Set the boot jumper on the Zybo Z7 to SD. 3. Insert the SD card into the Zybo Z7 and power it on. ************************************************** I'm using Vivado 2017.4 and i've copied the board_files to vivado software. After the point 3. (Type "source ./create_project.tcl") I get 7 warnings about some pins... am im doing something wrong here? I'm a newbie. Can you help me out to make the demos work, thanks in advance! ********************************************************************************************************* ## create_root_design "" WARNING: [BD 41-1306] The connection to interface pin /sw_gpio/gpio_io_i is being overridden by the user. This pin will not be connected as a part of interface connection GPIO WARNING: [BD 41-1731] Type mismatch between connected pins: /rgb2dvi_0/aRst_n(rst) and /v_axi4s_vid_out_0/locked(undef) WARNING: [BD 41-1306] The connection to interface pin /blur_edge_detect_0/ap_start is being overridden by the user. This pin will not be connected as a part of interface connection ap_ctrl WARNING: [BD 41-1306] The connection to interface pin /color_to_bw_0/ap_start is being overridden by the user. This pin will not be connected as a part of interface connection ap_ctrl WARNING: [BD 41-1306] The connection to interface pin /invert_0/ap_start is being overridden by the user. This pin will not be connected as a part of interface connection ap_ctrl Wrote : <C:/DesignVivado/Zybo_Z7_Embedded_Vision_Demo2/proj/bd/system/system.bd> Wrote : <C:/DesignVivado/Zybo_Z7_Embedded_Vision_Demo2/proj/bd/system/ui/bd_c954508f.ui> WARNING: [BD 41-721] Attempt to set value '50000000' on disabled parameter 'C_S_AXI_LITE_FREQ_HZ' of cell '/MIPI_D_PHY_RX_0' is ignored WARNING: [BD 41-721] Attempt to set value '200000000' on disabled parameter 'kRefClkFreqHz' of cell '/MIPI_D_PHY_RX_0' is ignored WARNING: [BD 41-721] Attempt to set value '100000000' on disabled parameter 'kRefClkFreqHz' of cell '/video_dynclk' is ignored INFO: [digilentinc.com:ip:axi_dynclk:1.1-17] /video_dynclkFREQ_HZ of 100000000 propagated into CONFIG.kRefClkFreqHz INFO: [digilentinc.com:ip:MIPI_CSI_2_RX:1.0-17] /MIPI_CSI_2_RX_0Verified that video_aclk frequency can handle RxByteClkHS frequency. AXI-Stream bandwidth 600000000 Pix/s >= PPI bandwidth 134400000.0 Pix/s INFO: [digilentinc.com:ip:MIPI_D_PHY_RX:1.0-17] /MIPI_D_PHY_RX_0FREQ_HZ of 50000000 propagated into CONFIG.C_S_AXI_LITE_FREQ_HZ INFO: [digilentinc.com:ip:MIPI_D_PHY_RX:1.0-17] /MIPI_D_PHY_RX_0FREQ_HZ of 200000000 propagated into CONFIG.kRefClkFreqHz INFO: [digilentinc.com:ip:MIPI_D_PHY_RX:1.0-17] /MIPI_D_PHY_RX_0FREQ_HZ of 84000000 propagated onto RxByteClkHS Wrote : <C:/DesignVivado/Zybo_Z7_Embedded_Vision_Demo2/proj/bd/system/system.bd> VHDL Output written to : C:/DesignVivado/Zybo_Z7_Embedded_Vision_Demo2/proj/bd/system/synth/system.vhd VHDL Output written to : C:/DesignVivado/Zybo_Z7_Embedded_Vision_Demo2/proj/bd/system/sim/system.vhd VHDL Output written to : C:/DesignVivado/Zybo_Z7_Embedded_Vision_Demo2/proj/bd/system/hdl/system_wrapper.vhd make_wrapper: Time (s): cpu = 00:00:08 ; elapsed = 00:00:08 . Memory (MB): peak = 1317.461 ; gain = 79.957 # set sdk_dir $origin_dir/sdk # set hw_list [glob -nocomplain $sdk_dir/*hw_platform*] # if {[llength $hw_list] != 0} { # foreach hw_plat $hw_list { # file delete -force $hw_plat # } # } # set sdk_list [glob -nocomplain $sdk_dir/*] # set sdk_list [lsearch -inline -all -not -exact $sdk_list "../sdk/.keep"] # if {[llength $sdk_list] != 0} { # exec xsct -eval "setws -switch ../sdk; importproject ../sdk" # } update_compile_order -fileset sources_1
  4. Hello, I am using Vivado 2018.2 i downloaded "Zybo-Z7-20-Pcam-5C-2018.2-*.zip" demo project in original project "part" option is choosen then I created a new vivado project i choose "board" option and i created same block design with "Zybo-Z7-20-Pcam-5C-2018.2-*.zip" demo project. I inserted same IP blocks and made connections. I did synthesis and implementation succesfully but when i exported to SDK and i tried to boot from SD card (i used hello world template) i did not see anything on terminal but when i am trying to export original project to SDK not which i create, then i can see hello world message on Terminal. Why did i not see anything in my project but i saw in original demo project? what could possibly be the problem? Hoping to read from you soon Best regards
  5. Dear Experts, The hdmi in to vga out demo project gives perfect resolution at 1080p settings. But, wherever I try to set other resolution as I need 720p, it gives me extended resolution. Is there any option that I can fix it at 720p? Coz the monitor I want to use for output doesn't support Full HD (1080p) resolution. https://reference.digilentinc.com/learn/programmable-logic/tutorials/zybo-hdmi-demo/start Regards- Shuvo
  6. Hi I have a general question about how to try out tutorials, demos, and just how to look at a project folder. When I open a tutorial/demo/project that I download from github, I always see a bunch of folders with the same names: hw_handoff, proj, repo, sdk, src, among other things. Can someone please explain these names, and maybe names of other folders that I may see in other projects? Are the contents of these folders dependent on each other? Can I implement the project with just one? How do I use these folders? Thanks
  7. Dear Experts, I want to implement XAPP1167 OpenCV HLS Xilinx project which mainly shows the edge at the output video. In the ZYBO hdmi demo project, I have added this custom IP between the interface of video in and AXI4 stream to VDMA. Initially, I got the error message says, "Bus interface property TDATA_NUM_BYTES does not match". Then I added axis_subset_converter_0 which allows me to downgrades TDATA width from 3 to 2 byte and successfully validated the updated designed. I also able to generate bit stream but the design does not fulfil the timing requirements. I am getting total negative slack -64.679 nano seconds. Please have a look into my design and give some possible suggestions. Regarding the IP core, I am sending a colour image of 1920*1080. Any kind of information regarding adding HLS ip into zybo hdmi demo project will be very helpful for me. thanks.. Shuvo
  8. Dear experts, I am actually new in this field and have a very few experience with zybo board. I have implemented the zybo_hdmi_in_demo which is required for my master thesis. Output video streaming at the VGA monitor shows a cropped part of my input video source. What should I do now? And can I use other HDMI source rather than my PC? And what is the preferred input HDMI video resolution? any kind of support or suggestions is highly appreciated.
  9. I'm wondering where do we find the source for the Cmod A7 Stopwatch demo? One the demo's page (https://reference.digilentinc.com/cmod_a7/cmod_a7/cmod_a7_stopwatch/start) I can only find links for the bit and bin files. Since this is the only one of the Cmod A7 demos that exercises the pins (as opposed to on-board features), it would be useful to have a known-good demo project to modify. Thanks!
  10. Hello, I'm trying to build this demo: https://reference.digilentinc.com/learn/programmable-logic/tutorials/arty-z7-hdmi-demo/start and I have error while generating project (after run in console "source ./create_project.tcl") WARNING: [IP_Flow 19-2406] Cannot identify part xc7k325tffg900-2 ERROR: [IP_Flow 19-2232] Current project options are not valid, cannot get 'PROJECT_PARAM.PART' Please help Any idea why it happens? I have: Windows 8.1 Vivado 2016.4 HLx WebPACK
  11. I'm trying to run the HDMI-in and HDMI-out demos on my ARTY Z7 board and I'm having problems building the SDK side of the projects. The problems are the same for both of these projects. After importing the project in the SDK I get the following error: 09:07:45 ERROR : The Hardware Project referenced by this BSP (hdmi_in_bsp) was not found in this workspace. As a result, this BSP will not build properly. To fix this error, please import the associated hardware project or recreate a new BSP targeting an existing hardware platform. Upon building the project I get the following errors (sorry for the Polish): Description Resource Path Location Type ../config.make: No such file or directory hdmi_in_bsp line 38 C/C++ Problem config.make: No such file or directory hdmi_in_bsp line 33 C/C++ Problem fatal error: xil_types.h: No such file or directory video_capture.h /hdmi_in/src/video_capture line 74 C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/axivdma_v6_2/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/coresightps_dcc_v1_3/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/cpu_cortexa9_v2_3/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/ddrps_v1_0/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/devcfg_v3_4/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/dmaps_v2_3/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/emacps_v3_3/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/gpio_v4_3/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/gpiops_v3_1/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/iicps_v3_4/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/qspips_v3_3/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/scugic_v3_5/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/scutimer_v2_1/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/scuwdt_v2_1/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/sdps_v3_1/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/standalone_v6_1/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/uartps_v3_3/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/usbps_v2_4/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/vtc_v7_2/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [ps7_cortexa9_0/libsrc/xadcps_v2_2/src/make.include] Błąd 2 hdmi_in_bsp C/C++ Problem make: *** [src/video_capture/video_capture.o] Błąd 1 hdmi_in C/C++ Problem make[1]: *** [coresightps_dcc_includes] Błąd 1 hdmi_in_bsp C/C++ Problem make[1]: *** [include] Błąd 1 hdmi_in_bsp C/C++ Problem make[1]: *** [profile_includes] Błąd 2 hdmi_in_bsp C/C++ Problem make[1]: *** [scugic_includes] Błąd 1 hdmi_in_bsp C/C++ Problem make[1]: *** [scutimer_includes] Błąd 1 hdmi_in_bsp C/C++ Problem make[1]: *** [scuwdt_includes] Błąd 1 hdmi_in_bsp C/C++ Problem make[1]: *** [standalone_includes] Błąd 1 hdmi_in_bsp C/C++ Problem make[1]: *** [xadcps_includes] Błąd 1 hdmi_in_bsp C/C++ Problem make[1]: *** [xddrps_includes] Błąd 1 hdmi_in_bsp C/C++ Problem make[1]: *** [xdevcfg_includes] Błąd 1 hdmi_in_bsp C/C++ Problem make[1]: *** [xdmaps_includes] Błąd 1 hdmi_in_bsp C/C++ Problem make[1]: *** [xemacps_includes] Błąd 1 hdmi_in_bsp C/C++ Problem make[1]: *** [xgpiops_includes] Błąd 1 hdmi_in_bsp C/C++ Problem make[1]: *** [xiicps_includes] Błąd 1 hdmi_in_bsp C/C++ Problem make[1]: *** [xqspips_includes] Błąd 1 hdmi_in_bsp C/C++ Problem make[1]: *** [xsdps_includes] Błąd 1 hdmi_in_bsp C/C++ Problem make[1]: *** [xuartps_includes] Błąd 1 hdmi_in_bsp C/C++ Problem make[1]: *** [xusbps_includes] Błąd 1 hdmi_in_bsp C/C++ Problem make[1]: *** Brak reguł do wykonania obiektu `config.make'. hdmi_in_bsp C/C++ Problem make[2]: *** [include] Błąd 1 hdmi_in_bsp C/C++ Problem make[2]: *** Brak reguł do wykonania obiektu `../config.make'. hdmi_in_bsp C/C++ Problem While building the project in Vivado I had some other problems which I manged to solve. I described my build below. I have followed the instructions on Digilent's reference site for the project, that is: I'm using Vivado 2016.4, I've installed the board suport files, I've cloned the demos from the Digilent github repo along with the Vivado library IP-cores I've successfully generated the projects via the tcl script with one warning, which doesn't look critical: WARNING: [BD 41-1731] Type mismatch between connected pins: /axi_dynclk_0/LOCKED_O(undef) and /rgb2dvi_0/aRst_n(rst) Next I ran the Generate Bitstream option and got an error that the top module wasn't set. I've set the top module to hdmi_out and went through elaboration and synthesis where I got the following warnings: [Common 17-55] 'set_property' expects at least one object. ["C:/Users/p1814/Documents/Arty-Z7-demos/Arty-Z7-20-hdmi-in/src/constraints/ArtyZ7_7020Master.xdc":82] [Common 17-55] 'set_property' expects at least one object. ["C:/Users/p1814/Documents/Arty-Z7-demos/Arty-Z7-20-hdmi-in/src/constraints/ArtyZ7_7020Master.xdc":83] [Common 17-55] 'get_property' expects at least one object. ["c:/Users/p1814/Documents/Arty-Z7-demos/Arty-Z7-20-hdmi-in/src/bd/hdmi_in/ip/hdmi_in_v_tc_1_0/hdmi_in_v_tc_1_0_clocks.xdc":5] [Common 17-55] 'get_property' expects at least one object. ["c:/Users/p1814/Documents/Arty-Z7-demos/Arty-Z7-20-hdmi-in/src/bd/hdmi_in/ip/hdmi_in_v_vid_in_axi4s_0_0/hdmi_in_v_vid_in_axi4s_0_0_clocks.xdc":11] [Vivado 12-259] No clocks specified, please specify clocks using -clock, -fall_clock, -rise_clock options ["c:/Users/p1814/Documents/Arty-Z7-demos/Arty-Z7-20-hdmi-in/src/bd/hdmi_in/ip/hdmi_in_v_tc_1_0/hdmi_in_v_tc_1_0_clocks.xdc":6] [Vivado 12-4739] set_max_delay:No valid object(s) found for '-to [all_registers -clock [get_clocks -of [get_ports -scoped_to_current_instance clk]]]'. ["c:/Users/p1814/Documents/Arty-Z7-demos/Arty-Z7-20-hdmi-in/src/bd/hdmi_in/ip/hdmi_in_v_tc_1_0/hdmi_in_v_tc_1_0_clocks.xdc":6] [Pfi 67-13] Hardware Handoff file hdmi_in_processing_system7_0_0.hwdef does not exist for instance processing_system7_0/inst Finally on bitstream generation I got the following error: [DRC 23-20] Rule violation (NSTD-1) Unspecified I/O Standard - 6 out of 153 logical ports use I/O standard (IOSTANDARD) value 'DEFAULT', instead of a user assigned specific value. This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all I/O standards. This design will fail to generate a bitstream unless all logical ports have a user specified I/O standard value defined. To allow bitstream creation with unspecified I/O standard values (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks NSTD-1]. NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: DDC_scl_i, DDC_scl_o, DDC_scl_t, DDC_sda_i, DDC_sda_o, DDC_sda_t. [Vivado 12-1345] Error(s) found during DRC. Bitgen not run. I've used the fix from https://www.xilinx.com/support/answers/56354.html to ignore these rules and managed to get a bitstream. Next, following the tutorial, I've exported the hardware along with the bitstream, but the export failed because no Hardware Handoff file was found. I followed the suggestions from https://forums.xilinx.com/t5/Embedded-Development-Tools/Cannot-Export-Hardware-Hardware-handoff-file-sysdef-does-not/td-p/539953 to manually generate the .sysdef file, and I managed to export the hardware and open the design in the SDK. I'm suspecting that the problem might be caused by the fact that I'm using Vivado installed by a different Windows user. I tried adding the Vivado and SDK location to the path variable, setting xilinx_sdk and xilinx_vivado variables, running the settings_64.bat scripts etc. but that didn't improve the outputs.
  12. Hi all FPGA fans and gurus ! First off : I am a total noob at all those FPGA and electronics things. So please be patient with me Now, for my problem : I recently got a second hand Atlys Board. My goal is to program it so that it can realtime rotate some hdmi input to its output. The input is a 640x480@60hz signal. The goal is to rotate it and output a 720p@60hz signal (640 pixels fit in 720, with black borders 40 pixels wide each side). So, as I don't know anything about FPGA programming, I downloaded the following EDK HDMI demo on the Atlys resource page, I thought it would be a good start to understand how hdmi inputs and outputs work with the Atlys board : https://reference.digilentinc.com/_media/atlys/atlys/atlys_hdmi_plb_demo.zip To build the project, I'm using ISE 14.7, fresh install (Windows 7). Actually I can build the project and program the Atlys with it, and even run it. However it seems it doesn't work OK. I looks like there are problem with interrupts, especially with the push buttons on the board. Wichever button I push, the callback function is never called. However, I have evidence the program does run. If, for instance, I change the main function to make it draw thing on the screen, it does it. I can also print things in the virtual terminal of the SDK. For instance, if I do a xil_printf at the beginnig of main(), things print in the terminal. However If I put a xil_printf at the beginning of the button handler function, whichever button i press nothing prints ... reason why I think it might be an interrupt problem. Needless to say that Adept button test is OK. Other thing : I'm using a fresh ISE 14.7 out-of-the-box install. I don't know if specific add-ons need installing to make Atlys work flawlessly with EDK. I might have missed some things. Especially, on the Atlys Resource page on Digilent's website, there is a zip archive and the following comment : "Atlys board support files for EDK BSB wizard. Supports EDK 13.2 - 14.7 for both AXI and PLB buses." Do I need this ? I don't have a clue about what BSB wizard is... I think all has been said =) Thanks in advance to all helpers ! Cheers
  13. Hi All, I am trying to use the ChipKITCAN library. This is a wrapper for the microchip CAN network library. I am using the legacy peripheral library to do this. I have been able to build the demo using MPIDE but I haven't been able to run it successfully. Is there any clear set of steps to run the demo in a chipkit max32? Also, I have been able to build this using Arduino IDE but running in the same issue. Any help is appreciated.
  14. Hi, I want to test ethernet of my Zybo board. Referring to xapp1026,I got how to use sdk to build a project,however,is there any demo to test ethernet in detail? For example,how to test the communication between board and PC? If I use standalone mode,then what should I do ?and for embeded system? Regards, Sophia
  15. I bought a Nexys™4 Artix-7 FPGA a while ago and I turned it on today. I was waiting for the user demo that comes pre-installed to say PASS but instead this time is says "Fail 2" "see doc". what does this mean? I cant find this anywhere in the document at all. Thanks alex
  16. Hello, I'm trying to get http://www.digilentinc.com/Data/Products/ATLYS/Atlys_AXI_Web_Server_Demo_v_1_02.zip to work on my Atlys board but I'm running into errors in SDK. After I clean & build, the elfcheck passes: 10:39:52 **** Incremental Build of configuration Debug for project Atlys_Webserver_Demo **** make all 'Building file: ../src/additional_sf_ops.c' 'Invoking: MicroBlaze gcc compiler' mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -I../../standalone_bsp_0/microblaze_0/include -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.40.b -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/additional_sf_ops.d" -MT"src/additional_sf_ops.d" -o "src/additional_sf_ops.o" "../src/additional_sf_ops.c" ../src/additional_sf_ops.c: In function 'hchartoi': ../src/additional_sf_ops.c:837:5: warning: array subscript has type 'char' [-Wchar-subscripts] ../src/additional_sf_ops.c:843:5: warning: array subscript has type 'char' [-Wchar-subscripts] 'Finished building: ../src/additional_sf_ops.c' ' ' 'Building file: ../src/dispatch.c' 'Invoking: MicroBlaze gcc compiler' mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -I../../standalone_bsp_0/microblaze_0/include -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.40.b -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/dispatch.d" -MT"src/dispatch.d" -o "src/dispatch.o" "../src/dispatch.c" ../src/dispatch.c: In function 'print_headers': ../src/dispatch.c:31:9: warning: implicit declaration of function 'print_echo_app_header' [-Wimplicit-function-declaration] ../src/dispatch.c:34:9: warning: implicit declaration of function 'print_rxperf_app_header' [-Wimplicit-function-declaration] ../src/dispatch.c:37:9: warning: implicit declaration of function 'print_txperf_app_header' [-Wimplicit-function-declaration] ../src/dispatch.c:40:9: warning: implicit declaration of function 'print_tftp_app_header' [-Wimplicit-function-declaration] ../src/dispatch.c:43:9: warning: implicit declaration of function 'print_web_app_header' [-Wimplicit-function-declaration] ../src/dispatch.c: In function 'start_applications': ../src/dispatch.c:52:9: warning: implicit declaration of function 'start_echo_application' [-Wimplicit-function-declaration] ../src/dispatch.c:55:9: warning: implicit declaration of function 'start_rxperf_application' [-Wimplicit-function-declaration] ../src/dispatch.c:58:9: warning: implicit declaration of function 'start_txperf_application' [-Wimplicit-function-declaration] ../src/dispatch.c:61:9: warning: implicit declaration of function 'start_tftp_application' [-Wimplicit-function-declaration] ../src/dispatch.c:64:9: warning: implicit declaration of function 'start_web_application' [-Wimplicit-function-declaration] ../src/dispatch.c: In function 'transfer_data': ../src/dispatch.c:71:9: warning: implicit declaration of function 'transfer_echo_data' [-Wimplicit-function-declaration] ../src/dispatch.c:74:9: warning: implicit declaration of function 'transfer_rxperf_data' [-Wimplicit-function-declaration] ../src/dispatch.c:77:9: warning: implicit declaration of function 'transfer_txperf_data' [-Wimplicit-function-declaration] ../src/dispatch.c:80:9: warning: implicit declaration of function 'transfer_tftp_data' [-Wimplicit-function-declaration] ../src/dispatch.c:83:9: warning: implicit declaration of function 'transfer_web_data' [-Wimplicit-function-declaration] ../src/dispatch.c:84:1: warning: control reaches end of non-void function [-Wreturn-type] ../src/dispatch.c: In function 'start_applications': ../src/dispatch.c:65:1: warning: control reaches end of non-void function [-Wreturn-type] 'Finished building: ../src/dispatch.c' ' ' 'Building file: ../src/echo.c' 'Invoking: MicroBlaze gcc compiler' mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -I../../standalone_bsp_0/microblaze_0/include -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.40.b -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/echo.d" -MT"src/echo.d" -o "src/echo.o" "../src/echo.c" 'Finished building: ../src/echo.c' ' ' 'Building file: ../src/http_response.c' 'Invoking: MicroBlaze gcc compiler' mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -I../../standalone_bsp_0/microblaze_0/include -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.40.b -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/http_response.d" -MT"src/http_response.d" -o "src/http_response.o" "../src/http_response.c" ../src/http_response.c: In function 'do_delete_file': ../src/http_response.c:529:12: warning: unused variable 'fd' [-Wunused-variable] ../src/http_response.c: In function 'do_list_file': ../src/http_response.c:729:4: warning: 'return' with no value, in function returning non-void [-Wreturn-type] ../src/http_response.c: In function 'do_http_get': ../src/http_response.c:868:4: warning: 'return' with no value, in function returning non-void [-Wreturn-type] ../src/http_response.c: In function 'data_receive_callback': ../src/http_response.c:353:5: warning: 'pcb' may be used uninitialized in this function [-Wuninitialized] ../src/http_response.c: In function 'do_download_file': ../src/http_response.c:459:7: warning: 'buf' may be used uninitialized in this function [-Wuninitialized] 'Finished building: ../src/http_response.c' ' ' 'Building file: ../src/main.c' 'Invoking: MicroBlaze gcc compiler' mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -I../../standalone_bsp_0/microblaze_0/include -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.40.b -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/main.d" -MT"src/main.d" -o "src/main.o" "../src/main.c" ../src/main.c: In function 'main': ../src/main.c:85:2: warning: implicit declaration of function 'lwip_init' [-Wimplicit-function-declaration] ../src/main.c:96:2: warning: implicit declaration of function 'platform_enable_interrupts' [-Wimplicit-function-declaration] ../src/main.c:116:3: warning: implicit declaration of function 'get_switch_state' [-Wimplicit-function-declaration] ../src/main.c:117:3: warning: implicit declaration of function 'get_pushbutton_state' [-Wimplicit-function-declaration] 'Finished building: ../src/main.c' ' ' 'Building file: ../src/platform.c' 'Invoking: MicroBlaze gcc compiler' mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -I../../standalone_bsp_0/microblaze_0/include -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.40.b -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/platform.d" -MT"src/platform.d" -o "src/platform.o" "../src/platform.c" ../src/platform.c: In function 'timer_callback': ../src/platform.c:50:2: warning: implicit declaration of function 'tcp_fasttmr' [-Wimplicit-function-declaration] ../src/platform.c:54:3: warning: implicit declaration of function 'tcp_slowtmr' [-Wimplicit-function-declaration] ../src/platform.c: In function 'xadapter_timer_handler': ../src/platform.c:62:11: warning: unused variable 'tcsr' [-Wunused-variable] ../src/platform.c:61:12: warning: unused variable 'timer_base' [-Wunused-variable] ../src/platform.c: In function 'init_platform': ../src/platform.c:257:2: warning: implicit declaration of function 'platform_init_fs' [-Wimplicit-function-declaration] 'Finished building: ../src/platform.c' ' ' 'Building file: ../src/platform_fs.c' 'Invoking: MicroBlaze gcc compiler' mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -I../../standalone_bsp_0/microblaze_0/include -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.40.b -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/platform_fs.d" -MT"src/platform_fs.d" -o "src/platform_fs.o" "../src/platform_fs.c" 'Finished building: ../src/platform_fs.c' ' ' 'Building file: ../src/platform_gpio.c' 'Invoking: MicroBlaze gcc compiler' mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -I../../standalone_bsp_0/microblaze_0/include -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.40.b -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/platform_gpio.d" -MT"src/platform_gpio.d" -o "src/platform_gpio.o" "../src/platform_gpio.c" 'Finished building: ../src/platform_gpio.c' ' ' 'Building file: ../src/prot_malloc.c' 'Invoking: MicroBlaze gcc compiler' mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -I../../standalone_bsp_0/microblaze_0/include -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.40.b -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/prot_malloc.d" -MT"src/prot_malloc.d" -o "src/prot_malloc.o" "../src/prot_malloc.c" ../src/prot_malloc.c: In function 'prot_mem_free': ../src/prot_malloc.c:39:1: warning: control reaches end of non-void function [-Wreturn-type] 'Finished building: ../src/prot_malloc.c' ' ' 'Building file: ../src/rxperf.c' 'Invoking: MicroBlaze gcc compiler' mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -I../../standalone_bsp_0/microblaze_0/include -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.40.b -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/rxperf.d" -MT"src/rxperf.d" -o "src/rxperf.o" "../src/rxperf.c" 'Finished building: ../src/rxperf.c' ' ' 'Building file: ../src/tftpserver.c' 'Invoking: MicroBlaze gcc compiler' mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -I../../standalone_bsp_0/microblaze_0/include -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.40.b -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/tftpserver.d" -MT"src/tftpserver.d" -o "src/tftpserver.o" "../src/tftpserver.c" ../src/tftpserver.c:57:8: warning: type defaults to 'int' in declaration of 'tftp_server_started' [-Wimplicit-int] ../src/tftpserver.c: In function 'tftp_process_read': ../src/tftpserver.c:191:13: warning: unused variable 'block' [-Wunused-variable] ../src/tftpserver.c:191:10: warning: unused variable 'n' [-Wunused-variable] ../src/tftpserver.c: In function 'tftp_process_write': ../src/tftpserver.c:276:13: warning: unused variable 'block' [-Wunused-variable] ../src/tftpserver.c:276:10: warning: unused variable 'n' [-Wunused-variable] ../src/tftpserver.c: In function 'start_tftp_application': ../src/tftpserver.c:406:1: warning: control reaches end of non-void function [-Wreturn-type] 'Finished building: ../src/tftpserver.c' ' ' 'Building file: ../src/tftputils.c' 'Invoking: MicroBlaze gcc compiler' mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -I../../standalone_bsp_0/microblaze_0/include -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.40.b -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/tftputils.d" -MT"src/tftputils.d" -o "src/tftputils.o" "../src/tftputils.c" 'Finished building: ../src/tftputils.c' ' ' 'Building file: ../src/txperf.c' 'Invoking: MicroBlaze gcc compiler' mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -I../../standalone_bsp_0/microblaze_0/include -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.40.b -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/txperf.d" -MT"src/txperf.d" -o "src/txperf.o" "../src/txperf.c" 'Finished building: ../src/txperf.c' ' ' 'Building file: ../src/urxperf.c' 'Invoking: MicroBlaze gcc compiler' mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -I../../standalone_bsp_0/microblaze_0/include -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.40.b -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/urxperf.d" -MT"src/urxperf.d" -o "src/urxperf.o" "../src/urxperf.c" 'Finished building: ../src/urxperf.c' ' ' 'Building file: ../src/utxperf.c' 'Invoking: MicroBlaze gcc compiler' mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -I../../standalone_bsp_0/microblaze_0/include -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.40.b -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/utxperf.d" -MT"src/utxperf.d" -o "src/utxperf.o" "../src/utxperf.c" ../src/utxperf.c: In function 'transfer_utxperf_data': ../src/utxperf.c:37:6: warning: unused variable 'copy' [-Wunused-variable] 'Finished building: ../src/utxperf.c' ' ' 'Building file: ../src/web_utils.c' 'Invoking: MicroBlaze gcc compiler' mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -I../../standalone_bsp_0/microblaze_0/include -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.40.b -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/web_utils.d" -MT"src/web_utils.d" -o "src/web_utils.o" "../src/web_utils.c" 'Finished building: ../src/web_utils.c' ' ' 'Building file: ../src/webserver.c' 'Invoking: MicroBlaze gcc compiler' mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -I../../standalone_bsp_0/microblaze_0/include -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.40.b -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/webserver.d" -MT"src/webserver.d" -o "src/webserver.o" "../src/webserver.c" ../src/webserver.c: In function 'http_sent_callback': ../src/webserver.c:86:13: warning: implicit declaration of function 'mfs_file_read' [-Wimplicit-function-declaration] ../src/webserver.c:91:17: warning: implicit declaration of function 'mfs_file_close' [-Wimplicit-function-declaration] ../src/webserver.c: In function 'http_recv_callback': ../src/webserver.c:115:3: warning: 'return' with no value, in function returning non-void [-Wreturn-type] ../src/webserver.c:117:3: warning: 'return' with no value, in function returning non-void [-Wreturn-type] ../src/webserver.c: In function 'start_web_application': ../src/webserver.c:158:2: warning: implicit declaration of function 'platform_init_gpios' [-Wimplicit-function-declaration] 'Finished building: ../src/webserver.c' ' ' 'Building file: ../src/xquad_spi.c' 'Invoking: MicroBlaze gcc compiler' mb-gcc -Wall -O0 -g3 -c -fmessage-length=0 -I../../standalone_bsp_0/microblaze_0/include -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.40.b -mno-xl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/xquad_spi.d" -MT"src/xquad_spi.d" -o "src/xquad_spi.o" "../src/xquad_spi.c" 'Finished building: ../src/xquad_spi.c' ' ' 'Building target: Atlys_Webserver_Demo.elf' 'Invoking: MicroBlaze gcc linker' mb-gcc -Wl,-T -Wl,../src/lscript.ld -L../../standalone_bsp_0/microblaze_0/lib -mlittle-endian -mxl-barrel-shift -mxl-pattern-compare -mcpu=v8.40.b -mno-xl-soft-mul -Wl,--no-relax -Wl,--gc-sections -o "Atlys_Webserver_Demo.elf" ./src/additional_sf_ops.o ./src/dispatch.o ./src/echo.o ./src/http_response.o ./src/main.o ./src/platform.o ./src/platform_fs.o ./src/platform_gpio.o ./src/prot_malloc.o ./src/rxperf.o ./src/tftpserver.o ./src/tftputils.o ./src/txperf.o ./src/urxperf.o ./src/utxperf.o ./src/web_utils.o ./src/webserver.o ./src/xquad_spi.o -Wl,--start-group,-lxil,-lgcc,-lc,--end-group -Wl,--start-group,-lxil,-llwip4,-lgcc,-lc,--end-group 'Finished building target: Atlys_Webserver_Demo.elf' ' ' 'Invoking: MicroBlaze Print Size' mb-size Atlys_Webserver_Demo.elf |tee "Atlys_Webserver_Demo.elf.size" text data bss dec hex filename 172996 1552 34190284 34364832 20c5da0 Atlys_Webserver_Demo.elf 'Finished building: Atlys_Webserver_Demo.elf.size' ' ' 'Invoking: Xilinx ELF Check' elfcheck Atlys_Webserver_Demo.elf -hw ../../hw_platform/system.xml -pe microblaze_0 |tee "Atlys_Webserver_Demo.elf.elfcheck" elfcheck Xilinx EDK 14.7 Build EDK_P.20131013 Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. Command Line: elfcheck -hw ../../hw_platform/system.xml -pe microblaze_0 Atlys_Webserver_Demo.elf ELF file : Atlys_Webserver_Demo.elf elfcheck passed. 'Finished building: Atlys_Webserver_Demo.elf.elfcheck' ' ' 10:40:03 Build Finished (took 11s.626ms) However when I click program FPGA, I get elfcheck -hw C:/Users/C16Evan.Richter/Desktop/microBlaze/final_project/hw_platform/system.xml -mode bootload -mem BRAM -pe microblaze_0 C:/Users/C16Evan.Richter/Desktop/microBlaze/final_project/Atlys_Webserver_Demo/Debug/Atlys_Webserver_Demo.elf elfcheck Xilinx EDK 14.7 Build EDK_P.20131013 Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved. Command Line: elfcheck -hw C:/Users/C16Evan.Richter/Desktop/microBlaze/final_project/hw_platform/system.xml -mode bootload -mem BRAM -pe microblaze_0 C:/Users/C16Evan.Richter/Desktop/microBlaze/final_project/Atlys_Webserver_Demo/D ebug/Atlys_Webserver_Demo.elf ELF file : C:/Users/C16Evan.Richter/Desktop/microBlaze/final_project/Atlys_Webserver_Demo/D ebug/Atlys_Webserver_Demo.elf ERROR:EDK:3165 - elfcheck failed! The following sections did not fit into Processor BRAM memory: Section .data (0xC002A3D0 - 0xC002A9CF) Section .rodata (0xC0027D04 - 0xC002A3CB) Section .dtors (0xC0027CFC - 0xC0027D03) Section .ctors (0xC0027CF4 - 0xC0027CFB) Section .fini (0xC0027CD4 - 0xC0027CF3) Section .init (0xC0027C98 - 0xC0027CD3) Section .text (0xC0000000 - 0xC0027C97) Try using the linker script generation tools to generate an ELF that maps correctly to your hardware design. Programming the FPGA failed due to errors from elfcheck My lscript.ld file is as follows: /*******************************************************************/ /* */ /* This file is automatically generated by linker script generator.*/ /* */ /* Version: Xilinx EDK 14.3 EDK_P.40xd */ /* */ /* Copyright (c) 2010 Xilinx, Inc. All rights reserved. */ /* */ /* Description : MicroBlaze Linker Script */ /* */ /*******************************************************************/ _STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x1000000; _HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x1000000; /* Define Memories in the system */ MEMORY { microblaze_0_i_bram_ctrl_microblaze_0_d_bram_ctrl : ORIGIN = 0x00000050, LENGTH = 0x00007FB0 mcb_ddr2_S0_AXI_BASEADDR : ORIGIN = 0xC0000000, LENGTH = 0x08000000 } /* Specify the default entry point to the program */ ENTRY(_start) /* Define the sections, and where they are mapped in memory */ SECTIONS { .vectors.reset 0x00000000 : { *(.vectors.reset) } .vectors.sw_exception 0x00000008 : { *(.vectors.sw_exception) } .vectors.interrupt 0x00000010 : { *(.vectors.interrupt) } .vectors.hw_exception 0x00000020 : { *(.vectors.hw_exception) } .text : { *(.text) *(.text.*) *(.gnu.linkonce.t.*) } > mcb_ddr2_S0_AXI_BASEADDR .init : { KEEP (*(.init)) } > mcb_ddr2_S0_AXI_BASEADDR .fini : { KEEP (*(.fini)) } > mcb_ddr2_S0_AXI_BASEADDR .ctors : { __CTOR_LIST__ = .; ___CTORS_LIST___ = .; KEEP (*crtbegin.o(.ctors)) KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors)) KEEP (*(SORT(.ctors.*))) KEEP (*(.ctors)) __CTOR_END__ = .; ___CTORS_END___ = .; } > mcb_ddr2_S0_AXI_BASEADDR .dtors : { __DTOR_LIST__ = .; ___DTORS_LIST___ = .; KEEP (*crtbegin.o(.dtors)) KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors)) KEEP (*(SORT(.dtors.*))) KEEP (*(.dtors)) PROVIDE(__DTOR_END__ = .); PROVIDE(___DTORS_END___ = .); } > mcb_ddr2_S0_AXI_BASEADDR .rodata : { __rodata_start = .; *(.rodata) *(.rodata.*) *(.gnu.linkonce.r.*) __rodata_end = .; } > mcb_ddr2_S0_AXI_BASEADDR .sdata2 : { . = ALIGN(8); __sdata2_start = .; *(.sdata2) *(.sdata2.*) *(.gnu.linkonce.s2.*) . = ALIGN(8); __sdata2_end = .; } > mcb_ddr2_S0_AXI_BASEADDR .sbss2 : { __sbss2_start = .; *(.sbss2) *(.sbss2.*) *(.gnu.linkonce.sb2.*) __sbss2_end = .; } > mcb_ddr2_S0_AXI_BASEADDR .data : { . = ALIGN(4); __data_start = .; *(.data) *(.data.*) *(.gnu.linkonce.d.*) __data_end = .; } > mcb_ddr2_S0_AXI_BASEADDR .got : { *(.got) } > mcb_ddr2_S0_AXI_BASEADDR .got1 : { *(.got1) } > mcb_ddr2_S0_AXI_BASEADDR .got2 : { *(.got2) } > mcb_ddr2_S0_AXI_BASEADDR .eh_frame : { *(.eh_frame) } > mcb_ddr2_S0_AXI_BASEADDR .jcr : { *(.jcr) } > mcb_ddr2_S0_AXI_BASEADDR .gcc_except_table : { *(.gcc_except_table) } > mcb_ddr2_S0_AXI_BASEADDR .sdata : { . = ALIGN(8); __sdata_start = .; *(.sdata) *(.sdata.*) *(.gnu.linkonce.s.*) __sdata_end = .; } > mcb_ddr2_S0_AXI_BASEADDR .sbss (NOLOAD) : { . = ALIGN(4); __sbss_start = .; *(.sbss) *(.sbss.*) *(.gnu.linkonce.sb.*) . = ALIGN(8); __sbss_end = .; } > mcb_ddr2_S0_AXI_BASEADDR .tdata : { __tdata_start = .; *(.tdata) *(.tdata.*) *(.gnu.linkonce.td.*) __tdata_end = .; } > mcb_ddr2_S0_AXI_BASEADDR .tbss : { __tbss_start = .; *(.tbss) *(.tbss.*) *(.gnu.linkonce.tb.*) __tbss_end = .; } > mcb_ddr2_S0_AXI_BASEADDR .bss (NOLOAD) : { . = ALIGN(4); __bss_start = .; *(.bss) *(.bss.*) *(.gnu.linkonce.b.*) *(COMMON) . = ALIGN(4); __bss_end = .; } > mcb_ddr2_S0_AXI_BASEADDR _SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 ); _SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 ); /* Generate Stack and Heap definitions */ .heap (NOLOAD) : { . = ALIGN(8); _heap = .; _heap_start = .; . += _HEAP_SIZE; _heap_end = .; } > mcb_ddr2_S0_AXI_BASEADDR .stack (NOLOAD) : { _stack_end = .; . += _STACK_SIZE; . = ALIGN(8); _stack = .; __stack = _stack; } > mcb_ddr2_S0_AXI_BASEADDR _end = .; } I have not modified any files given in the demo. Can someone please help me figure out what to do so that the project compiles and can be programmed on my Atlys board? Thanks