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Found 20 results

  1. How do I implement an external differential clock in VHDL for the CMOD S7? Vivado keeps on telling me to inset this flag in my constraint file: set_property CLOCK_DEDICATED_ROUTE FALSE However, I care about timing because it's an external clock signal. I'm using a clock dedicated route(Pmod pin are 2×6) as seen in this schematic.
  2. TireV

    Cmod S6 - Multilayer?

    Hello all together, I'm working on a CmodS6 board for my university course right now. It'd be helpful to now something about the layer design of the Board. I assume it's a multilayer PCB, so at least 1 layer between front and back side, but can anyone tell me something more about it? e.g. common ground plate yes/no? Hope these information are not somehow confidential or protected, then never mind my question :) Thanks for any input!
  3. DigitalConfig

    Arty CMOD HUB

    Its great that DIgilent Has a Bread boardable PCB Mountable version of the ARTY (THE CMOD Version). However, It price doesn't reflect a true stripped down simplification. I am wondering if DIgilent might consider stripping the CMOD version down even further such that its cost could be reduced further such that a HUB of many CMODs where only USB/JTAG FPGA FLASH and GPIOS would be needed and could be implemented at a minimal price. I believe such a product would increase product demand, and of course meet my needs as well as others. Such a device would result in a true PIP universal IC with a presumably bare minimum price tag. As a PCB mountable UNIT it doesn't seem to require the PMOD SRAM buttons or LEDs. It listed as a bread boardable UNIT in which case has those features, however the ARTY Module has Bread boardable PMOD cables available, making such a minimal price difference unjustified where the user is just going to bread board. The CMODs true nature of being PCB mountable seems to require a further circuitry simplification to lower its cost and make It more cost effective. Is/Would this be possible on Digilent's part? Sincerely, DC
  4. etownsend

    Cmod A7 Clocking

    The schematic diagram for the Cmod A7 shows a clock with part number ASEM1-100.000MHZ-LC-T, which is a 100MHz clock. However when I look at the actual clock component it says it's 12MHz chip, which I confirmed by scoping the output. Is there any way to get a 100MHz clock signal out of this board?
  5. I am trying to implement a simple JTAG chain in a Cool Runner II development board. I am taking various TDI and TDO signals and routing them in the CPLD depending on what FPGAs are powered on. I see that the CMOD CPLD board provides headers for the clock pins but no actual clock. Can I run a design without a clock if it's just simple switches inside the CPLD to interconnecting TDI and TDO signals?
  6. All: I'd like to get your thoughts on the following question: In, page 9. The Analog input circuit describes using a voltage divider to step a 0 to 3.3 range to 0 to 1 as required by the analog inputs. What I am also noting (and have measured) is that the input has a 3.3K impedance. I've been trying to get a TMP36GZ temperature monitor to work with this input and now suspect based on this temperature sensor's spec that the 3.3K draws too much current for this high impedance device. Has anyone else had any experience with limitation on the these analog inputs due to their lower impedance? Peter
  7. Hi, could it be possible to have the source code of the mentioned bootloader? I mean the one used to generate chipKIT_Bootloader_Cmod.hex
  8. Hello, I am using a chipKIT CMOD design and can successfully run the watchdog timer code provided my Majenko. My problem is that I occasionally get a nasty burst of electrical noise from a motor that completely freezes up the board. The 8MHz oscillator continues to run, and it resets correctly with a power cycle. Is there a mode that would prevent the watchdog from resetting the system? Thanks in advance Patrick
  9. I spotted a question on Stack Exchange's electronics forum regarding symbols in the A7's schematic … I'm not the original poster, but I'm now very curious too – what do those coloured blocks on certain groups of pins mean?
  10. Shana

    Cmod A7 uart problem

    Hello, I'm working with the Cmod A7 but I have a problem with uart communication I need to send data continously to pc for about 3 to 4 days During the test the COM port its suddenly disconected and no more serial data it's received on PC I used also external power source but I had the same problem, the maximum time I've reached it's around 4 hours Do you have any idea or suggestions to solve this problem?
  11. Hi,Even though I think this board should be towards questions about Digilent boards specifically, see if you can help me (I tried Xilinx forums without success). I am using the XADC's Vaux4 and Vaux12 on my Cmod A7. However, I'm having difficulties implementing the simultaneous sampling function using the XADC Wizard (Vivado 2016.2). From the wizard I get the ADC module with one address_in "pin" and one data_out "pin". My question is, if it is sampling both pairs simultaneously, how do I access the data? Wouldn't it be necessary to have two data outputs, one for each pair? How does it work? Thank you guys for your time and patience,Leo
  12. Hello guys, this question is aimed primarily at Digilent staff but if anyone has an answer, I'm not choosy :-) I just got a CMOD A7 and I'm bringing it up by going through simple projects and tutorials. I'm stumped by this one : I've followed it to the letter, but reality diverges from the internet at step 13. There is nothing in my SDK's "Run As" menu. Why is that, and how can I fix this ? The whole tutorial never mentions the reset signal : how is it generated ? JTAG only ? Also, whenever I upload any bitstream to the FPGA, I get this message : WARNING: [Labtools 27-3123] The debug hub core was not detected at User Scan Chain 1 or 3. I've tried everything to appease Vivado but to no avail. I get this message even with this tutorial, yet it's never mentioned in any tutorial. Google wasn't any help. Could this be somehow related to my troubles in SDK ? I'm using Vivado 2016.1. Not to criticize, but a tutorial should "just work", otherwise there's not much point to it. Here I have several instructions I need to "interpret", for example, step 11 : "Make sure that the Cmod A7 is (...) connected to the host PC via both the JTAG USB port and the UART USB port." I see two COM ports when I plug the module in, but there's no way to tell which is which except trying to open one with Tera Term while Vivado's hardware manager is connected to the module (if it fails, that must be the JTAG). Also, while I understand that JTAG needs to be connected (and it seems to be, since I can program the device) why does to the UART need to be connected too ? And to what ? I tried having the UART connected to Tera Term while programming the FPGA from the SDK. Since the SDK mentions integrating the ELF into the bitstream, I expected at least to get the "Hello World" once the programming was complete, but got nothing. By the way, the module itself works : it runs the default code it ships with, and I do get the RAM test report coming out on the USB UART, so this isn't a hardware problem. I'm using Windows 10 but as far as I can tell this isn't an issue. I hope a good soul out there can spare a moment to help me :-) Edit : I'm going through the tutorial again with a fine-tooth comb. As early as project creation I get this warning : WARNING: [Board 49-26] cannot add Board Part available at C:/Xilinx/Vivado/2016.1/data/boards/board_files/genesys2/H/board.xml as part xc7k325tffg900-2 specified in board_part file is either invalid or not available Since I've selected the CMOD A7 A35T I don't get why Vivado would show this. I have checked the reset chain, it seems the board file sets button 0 as a reset source, active high, which matches the module's schematics. I don't know what I did differently but this time I got a full "Run As" menu at Step 13. However when I tried to launch the program I got a big error dialog box that told me : "Could not find FPGA device on the board for connection 'Local'." The board had been plugged in ever since I created the project in Vivado... I'll keep looking and update my question if I find anything new. Edit 2 : got a hunch that this last error could be due to some program not closing a COM port properly. So I re-launched the SDK, unplugged / replugged the module to force Windows to close its COM ports, re-programmed the FPGA with its bitstream... and then I tried Step 13 again. The "Run As" submenu was empty again for some reason (does anyone know ?) but "luckily" the System Debugger entry was still available in the Run Configurations dialog box. This time it worked, in that I got "Hello World" on the UART. Still, the whole process kinda smells of voodoo and instability at this point. Can we get clearer instructions in the tutorial ? Or are my problems due to some Windows 10 incompatibility or maybe using the wrong version of Vivado / SDK ?
  13. Ryan

    Safe handling of CMOD S6?

    I am a Project Lead the Way teacher using the CMOD S6 chips during labs for most of 2nd semester. Our curriculum is designed to use these chips as a bundle with the NI MyDAQ system. I have been doing electronics for a while and understand how touchy CMOS logic can be, but I am burning through these chips weekly. I'm not sure what I'm missing here or if I received a bad batch of chips, but I have students avoiding touching the chips completely at this point, as well as having static wrist straps on. They do no wiring while the chip is powered on, and have them grounded to the board when we are using the onboard logic (buttons / switches) from the MyDAQ. Any help?? I understand I don't have much to go on here, but anyone else that has been down this road with PLTW, I'd be happy to have some advice here before I have to go spend another $1000 on chips.
  14. Hello! I have students trying to use MSI down counters in multisim, and programming them to the CMOD S6. In simulation, we aren't experiencing any ripple issues, but when we transfer to the CMOD S6, the counters reset at 0111 instead of waiting until 1111. I've attached the multisim file. We've tried putting a series of inverters on one of the outputs of the counter to see if it would "slow" the bit enough to prevent the trigger, but it doesn't really seem to be working. Any assistance would be greatly appreciated! Thanks! RippleIssue.ms12
  15. Hello there, as far as I know all PIC32 chips have integrated RTCC capabilities. On the Uno32 board RTCC can be used after soldering an oscillator to a spot for it marked as X2. What about the CMOD board? It has a PIC32MX150F128D, but I am unable to find the location reserved for soldering in the oscillator. So my question - how does one use RTCC with the Chipkit CMOD microcontroller module? Thank you in advance!
  16. wheezs

    cmod 6 clock

    hey i cant finger out how to get the internal clock to use in projects
  17. rmrosnik

    Cmod S6

    Good Afternoon, We are Project Lead the Way School using the Cmod S6 for the first time this year. We are having issues with these items working. They have been very reliable for the past month. However, the small red LED light does not show power. They are no longer working. Is there a fix I can do or who do I send them to for either a replacement or repair?
  18. HI, I am trying to figure out if the OLED Pmod can work with the chipKIT Cmod. Code was taken directly off the Pmod OLED web page. In one version of the demo code -- the Cmod is not mentioned. oledlibrary1 by laraswanland, on Flickr IN a near identical version (on the same page), the Cmod IS mentioned. oledlibrary2 by laraswanland, on Flickr Both demos have OLEDdemo as the sketch. Neither of them work when I have the Pmod OLED plugged into J1 of the Cmod. Can someone take a look at which library is correct? and if the Pmod OLED can work with the Cmod?
  19. Hi everyone, I am working on a pinmap for the Cmod and am interested to get suggestions on what signals are the most useful. These are the ones I felt I needed, but I have a few extra lines I can add a few more!
  20. Using the PmodOLED and the chipKIT Cmod-- I was able to make the file work on my work-Windows PC I downloaded the newest file from the webpage (thanks to previous post:) and got the library into my sketchbook folder. However, when I tried to compile on my home MacBook, I kept getting this error: Uninstall, reinstall MPIDE. Delete all libraries. Reinstall it again. Then, went to the MPIDE Icon, held down Control+ click and went to "Show Package Contents" Which then I navigated to Contents->MacOSX>Resources>Java>Hardware>pic32>compiler>pic32-tools>include>sys Screen Shot 2015-01-28 at 9.39.48 PM by laraswanland, on Flickr ... and verified that the file was there. Screen Shot 2015-01-28 at 9.41.55 PM by laraswanland, on Flickr ... I reopened MPIDE Opened the OLED Demo Example Hit Verify... Same irritating error. So I grabbed the sysattribs.h: and put it into my search bar. and came up with the file OLEDDriver.cpp that had it directly referenced. Screen Shot 2015-01-28 at 9.34.08 PM by laraswanland, on Flickr ... Opened the file up + found sysattribs.h and it was oddly the only include with a directory slash... <sysattribs.h> Screen Shot 2015-01-28 at 9.32.36 PM by laraswanland, on Flickr Tried a few things, but it turns out if you switch the direction of the slash... and hit save... the file will compile. <sys/attribs.h> Screen Shot 2015-01-28 at 9.33.12 PM by laraswanland, on Flickr Screen Shot 2015-01-28 at 9.32.49 PM by laraswanland, on Flickr So change the <sysattribs.h> to <sys/attribs.h> My thoughts is that there may be a weird syntax that Windows uses that can use the forward-slash, but Mac (and maybe Linux) can't use it? Is this something other people have noticed?