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  1. Can you please create statement of volatility docs for Cmod A7-15T and Cmod A7-35T, similar to the thread below.
  2. Hi, I have a brand new Digilent A7-35T board I tried to program via the USB built in JTAG using Vivado 2018.2. The part intermittently shows up in Hardware Manager, but a seconds later disconnects. Sometimes it disconnects just being connected (opened) in Hardware Manager and sometimes during programming. It is even worse if I try to erase and program the QSPI flash. I also downloaded and installed the latest Digilent Adept 2 with updated drivers and observed the same behavior. I tried different USB cables, different USB ports directly on my PC, via a powered hub, but the behavior is alwa
  3. Hello! I am started to create an application with Vivado 18.1 on Cmod A7 board with microblaze and 2 Pmod NAV IP. I downloaded these from Digilents's repository. After I successfully generated the bitstream from the hardware design, I exported and launched the Vivado SDK. I got the following error: 14:51:02 ERROR : (XSDB Server)ERROR: [Hsi 14:51:02 ERROR : (XSDB Server)55-1550] Repository Directory C:/Users/L1/Documents/vivado_projects/project_x/project_x.sdk/szstem_wrapper_hw_platform_3/drivers doesn't exist in the disk 14:51:02 ERROR : Failed to openhw "C:/Users/L1/Documents/vivad
  4. Hi everybody, I have to communicate with the FPGA on my CMOD A7 board through the on board FTDI FT2232HQ chip. While on a PmodUSBUARD, for example, I can use the RTS/CTS hardware wires for the flow control, on the board datasheets it's written that I can only use the TX and RX hardware wires and that there are no RTS/CTS wires (fact confirmed by the board .xdc file too). How can I set reliable control flow for my high-speed communication (from 6Mbaud to 12Mbaud) ? Any advice? Thank you in advance, Antonio Daril Crispino
  5. Hi all, I have been working with the CMOD A7 board using vivado 2018 and sdk. I have been trying to get the microblaze soft core to respond to the interrupts generated by the peripherals. I started with the timer but have since moved simpler to the uart. I have connected my hardware as shown here. And the code that I am testing is an imported example from drivers board support package. Specifically, it is the one from the uartlite and it is the interrupt exapmle. /****************************************************************************** * * Copyright (C) 2002 - 20
  6. Hi All, I have recently downloaded Vivado 2018.2 and begun playing around with CMOD A7 35T. I did the the blinky tutorial and then just finished Cmod A7 Programming Guide. At the end of which, I programmed the button project into the flash memory of the device. I then disconnected the device and plugged it back in to verify the code was loaded onto the device on startup. The code indeed loaded and I can light the LEDs with the corresponding button; however, now my host pc cannot find the target device anymore. I tried restarting Vivado and plugging and unplugging the FPGA board and n
  7. Hi All, Does anyone know the source of the signal "GCLK" on the Cmod A7? The source for "GCLK" appears to be "usb_12MHz" ... however, there is no reference to this signal on the schematic (as far as I can tell). At first, I thought "GCLK" was driven by the 100MHz oscillator, then I noticed that this component was a "no-load", sure enough, I can measure a 12MHz signal directly on the board and the timing of my strobes validates that. Does anyone have any insight? Many thanks, Tim.
  8. Hi, I'm using an CMOD A7 board that use an FT2232HQ USB-UART bridge. I have installed the driver from FTDI Chip Community and all work perfectly but sometimes there is an issue. I have about 10 board, if i connect one to pc and try to communicate with it, all work, sometimes if i disconnet this board and connect another the Pc recognized it but i can't communicate with it. I don't know why but to bypass this issue i need to open device manager and uninstall the USB Composite Device Driver and install it again and all work correctly. This is an issue because i won't to do t
  9. Hi all, actual i try to transfer a data stream from the DMA via uart to my PC. In my design an DDS-compiler generates a 32bit sine wave, which should be transfered via uart and read by a python script. The general data transfer works, but sometimes i get some noisy signal. This signal happens also when using a lower sample rate. For the uart data transfer actual i did not add any marker where the 32 bit value begins or ends. So i expect this is the problem, but i don't know how to include this in my SDK and python code. Maybe any suggestion? (The FPGA design is
  10. Hi, I have very little experience with programming FPGA's so recently purchased a CMOD A7 to teach myslef. I have followed the tutorial on LED Button and it worked fine. What i would like to do next create a sketch that turns on the LED when a pin goes HIGH and then once I understand how to do this output a pin HIGH when another goes HIGH. Below is the file used for the LED when button is pressed. Where can I go to learn how to do this? In the code below what does `timescale 1ns / 1ps do? `timescale 1ns / 1ps module btn_led( input [1:0]btn, // Button
  11. Once again I'm sorry if I'm asking what can be considered silly questions, but I'm diving into the FPGA world by myself and I'm having serious dificulties finding documentation or examples that fit my questions. I'm using a Cmod A7 and I want to develop a GUI to let the user define some parameters. Through what I've been researching I believe the way to do it is using UART with the micro usb of the board. I've seen some examples of UART implementations, some I found in responses here on the forum, but due to my lack of knowledge it seems to me they lack important things so I could underst
  12. hello, i am using cmod a7. i am trying to blink the led at 1 sec delay(using verilog language). please help me with the code and also let me know the frequency we will be using to create delay and at which pin will it be available.
  13. I have an Arty-35 evaluation board that came with a device-locked, node-locked Vivado license. (BTW, the board and tools are very nice). Does my limited Vivado license also cover programming the Cmod A7: Breadboardable Artix-7 FPGA Module which also uses an Artix-7 A7-35T FPGA component? I think they're the same Artix-7 device, so it seems like it should work. I'd like to purchase one of these Cmod A7 FPGA DIP devices, but I want to be sure my Vivado license will cover it.
  14. anurag

    ethernet with cmod A7

    hello, i want to know whether or not it is possible to connect ethernet port to CMOD A7. as number of input output lines are restricted .if yes then how?
  15. Hi folks, I'm using some very basic examples with Cmod A7, which work in the sense that they result in a behaving FPGA. However, I'm trying to get rid of, or at, least understand the various warnings. One warning that occurs for all examples I tried is: CFGBVS-1#1 Warning Missing CFGBVS and CONFIG_VOLTAGE Design Properties Neither the CFGBVS nor CONFIG_VOLTAGE voltage property is set in the current_design. Configuration bank voltage select (CFGBVS) must be set to VCCO or GND, and CONFIG_VOLTAGE must be set to the correct configuration voltage, in order to determine the I/O voltage
  16. I'm wondering where do we find the source for the Cmod A7 Stopwatch demo? One the demo's page (https://reference.digilentinc.com/cmod_a7/cmod_a7/cmod_a7_stopwatch/start) I can only find links for the bit and bin files. Since this is the only one of the Cmod A7 demos that exercises the pins (as opposed to on-board features), it would be useful to have a known-good demo project to modify. Thanks!
  17. Hi, I am trying to make conventional FT2232H JTAG work with the CMOD A7. The method is standard and has been used for many years (e.g. xc3sprog.exe), my code works with many other boards, including the Digilent-licensed adapters sold by Trenz-Elektronik. My board itself is functional (Vivado Hardware manager recognizes it correctly), but I can't get my own JTAG code to work: The data readback pin of the JTAG interface appears to be stuck on HIGH. Any attempt to read IDCODE, or loop data through BYPASS mode, returns all-ones 0xFF. Unfortunately, there is a missing page in the sch
  18. Hi, Can I use a CMOD A7 to run co-simulations using Vivado System Generator? In previous versions of System Generator it was possible to add custom boards. Is there a way to do it in Vivado?
  19. Hi All, I have the Cmod A7 35T, downloaded Vivado 2016.4, and I am on Windows 7 OS. When I go into the hardware manager I can connect to the localhost (connect_hw_server) but when I attempt open_hw_target I get the following error in the Tcl Console: Error: [Labtoolstcl 44-469] There is no hw_target. I've checked to make sure that my device drivers are up to date. I'm just using a standard micro-usb cable that I had in my house. According to Digilent, I don't need a special USB cable. Any help or advice you could provide would be extremely appreciated. Thanks! Edit
  20. Hi, I have a question, there is a way to programm my Cmod A7 without Vivado->Hardware Manager? I got some issues with Vivado, sometime crash. Another question is, there is a way to separate programming phases? At moment i have a download.bit, firmware.srec and data.txt, with hardware manager i have fused them in firmware.mcs and have flashed it in my SPI Flash. There is a way to program my flash only with download.bit and firmware.srec and later with data without overriding the other memory banks? Kind Regards Stefano
  21. Hi all, I have an interrupt that is generated by a custom ip and when it is triggered, I read a register from the custom ip and read from the pmod sf3 to write those values back to the custom ip. However the interrupt gets stuck and won't return to the main code when I have the pmod sf3 code in there, but it does when I just read a value from the custom ip and print it. I have attached the c code that I have written. Any ideas why this is happening? Thanks! c_code.txt
  22. For bitstream encryption using battery-backed RAM, you are suppose to supply the Vccaux pin with voltage to keep the encryption key alive in memory. 1. Where is the Vccaux pin on the Cmod A7? (Hopefully it is not the VU pin because it would be really wasteful to power the whole FPGA just to keep the encryption key alive!) 2. What voltage is supposed to be supplied? Thanks, David
  23. Hi all, I programmed my flash recently, but the sdk .elf file didn't seem to be working so I attempted the whole process again. However, now my board seems to be stuck in somewhere not so good. When I plug the USB in, only a red led is on, compared to originally before flash, the orange done led was also on. Also, now I can no longer program the qspi flash in vivado hardware manager anymore. It always fails during the programming stage because the blank check fails. Is my flash stuck in some kind of mode? Also, how can I clear it and restore my fpga to it's original state? Thanks!
  24. vc26

    CMOD A7 35t BRAM Problem

    Hi all, I'm trying to read and write to a BRAM on the CMOD a7 35t (artix 7). However, it always reads back zero. I set it up the same way on the ARTY board and it read back fine. Does anyone know the explanation for this, or have any possible solutions? Thanks!
  25. hi, i have a question. I need to communicate with my Cmod A7 35T using arduino. I know that it is can't communicate directly but i found a middle chip that could be a solution. This component is : http://www.hobbytronics.co.uk/usb-host-serial with new firmware i can set on this chip the right communication port. My design is something like this, arduino send serial data to usb host that convert and send them to cmod, i have setted the right coomunication port and the right boudrate but there is an issues. I can see the datas flow (using the led) but USB-UART bridge can