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Found 6 results

  1. I am running Vivado 18.3 on Ubuntu 18.04, and cannot connect to my Arty board. While troubleshooting, I found directions on installing cable drivers and board files (https://reference.digilentinc.com/vivado/installing-vivado/start), however I cannot find the path referenced in 2.1. I have an /opt directory, but it is empty, and while I can find a couple /data directories that look like they could be correct, none of them contain a xicom (or .xicom) directory. Note: I installed Vivado a while back but never got around to playing with the board until now. I wanted to exhaust all options before trying a fresh install of Vivado. SOLUTION UPDATE: I found the correct directory path by typing "which vivado" into the terminal, which pointed me to /tools/Xilinx/Vivado instead of /opt/Xilinx/Vivado
  2. I am trying to install Vivado 17.4 for windows on my Windows 10 Pro 64 bit pc. The board files that I want are labeled 15.4. Is that what it should be? I have Vivado 17.4 installed on my pc. I have never installed Vivado and Diligent board files before. My downloaded zip files creates a directory just off the Desktop when i unzip the downloaded zip files. I am unsure as to what to do next. Any help appreciated. Thanks in advance. respectfully, Newport_j
  3. Hello, I am quite new to the Zybo Zynq 7010 and Vivado in general. I have tried various tutorials involving the use of the Zynq Processing System and Axi GPIO to blink LEDs on the board. No errors in the proccess, but the LEDs do not blink at the end. I followed one thread regarding Integration of the Board files in Vivado but I still seem not to have any success as the LEDs still do not blink. I am also unable to access UART which I am guessing sterns from the same problem. Any solutions on installing/integrating board files/parts on Vivado for Zynq 7010 ???
  4. Hi I'm writing a new board file based on the board.xml from the ARTY but with a modified SPI device. I want to use another pin as SS2 (select slave, or chip select, 2), in order to communicate with two SPI devices through the same bus. This is the diff between original board files and mine: --- a/new/board_files/newboard/1.0/preset.xml +++ b/new/board_files/newboard/1.0/preset.xml @@ -25,6 +25,7 @@ <user_parameter name="CONFIG.C_C_SCK_RATIO" value="16"/> <user_parameter name="CONFIG.C_USE_STARTUP" value="0"/> <user_parameter name="CONFIG.C_USE_STARTUP_INT" value="0"/> + <user_parameter name="CONFIG.C_NUM_SS_BITS" value="2"/> </user_parameters> </ip> </ip_preset> --- a/new/board_files/newboard/1.0/board.xml +++ b/new/board_files/newboard/1.0/board.xml @@ -579,19 +579,22 @@ <pin_map port_index="0" component_pin="spi_sclk_i"/> </pin_maps> </port_map> - <port_map logical_port="SS_I" physical_port="spi_ss_i" dir="in"> + <port_map logical_port="SS_I" physical_port="spi_ss_i" dir="in" left="1" right="0"> <pin_maps> - <pin_map port_index="0" component_pin="spi_ss_i"/> + <pin_map port_index="0" component_pin="spi_ss_i_0"/> + <pin_map port_index="1" component_pin="spi_ss_i_1"/> </pin_maps> </port_map> - <port_map logical_port="SS_O" physical_port="spi_ss_o" dir="out"> + <port_map logical_port="SS_O" physical_port="spi_ss_o" dir="out" left="1" right="0"> <pin_maps> - <pin_map port_index="0" component_pin="spi_ss_i"/> + <pin_map port_index="0" component_pin="spi_ss_i_0"/> + <pin_map port_index="1" component_pin="spi_ss_i_1"/> </pin_maps> </port_map> <port_map logical_port="SS_T" physical_port="spi_ss_t" dir="out"> <pin_maps> <pin_map port_index="0" component_pin="spi_ss_i"/> </pin_maps> </port_map> </port_maps> I haven't added another pin_map inside SS_T, as AXI QUAD SPI when configured with two slave devices, still only provides a single SS_T pin: Finally, I've replaced original spi_ss_i on part0_pins.xml with two lines, one defining loc pin of spi_ss_i_0 and one for spi_ss_i_1 (never mind exact pin numbering): - <pin index="93" name ="spi_ss_i" iostandard="LVCMOS33" loc="B20"/> + <pin index="93" name ="spi_ss_i_0" iostandard="LVCMOS33" loc="B20"/> + <pin index="94" name ="spi_ss_i_1" iostandard="LVCMOS33" loc="C20"/> However, Vivado won't let me use this board definitions with the following message: WARNING: [Board 49-69] Validation failed for board file vivado-boards/new/board_files/newboard/1.0/board.xml: Pin Map file does not provide LOC constraints for spi_ss_iCOMP : agamez:newboard:part0:1.0 What should I do?
  5. Hello It seems that Zybo Board files at Git are faulty. It gives some error messages, when connecting Leds to GPIO by assistant. See the picture. XDC master file has miss typo at one of VGA_R bits also.
  6. Hello, I want to start using FPGAs. At this moment I have no board but I am hoping to get one soon. Yesterday I installed the Vivado WebPack edition 2015.4. Currently I want to learn how to use the Software. I have seen some Tutorials on the Digilent Wiki. So I wanted to install some board files to use with Vivado. Somehow I can not get them to be displayed on the 'Create New Project' wizard. I downloaded the board files and put the folders ( arty,nexys_video,nexys4 ... ) into: E:\Xilinx\Vivado\2015.4\data\boards\board_files. When I start a new project I enter a name at the first page. I skip the two 'Add/Remove Files' pages and then I try to select a board at the 'Solution Configuration' window. If I switch from 'Parts' to 'Boards' there are boards displayed but not those which are in the 'board_files' folder. The list contains eight Virtex boards. I have no Virtex board files in the 'board_files' folder. Is the location where I put the files wrong? I have already searched for other possible locations. It seems that the board which are listed are saved at: C:\Users\MrMcChicken\AppData\Local\Xilinx\DocNav\hubs\boards_and_kits If I chang the files there the list at the 'Create New Project' wizard doesn't changes. This confuses me just even more. How and where do I have to place the board files?