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Showing results for tags 'board file'.
Found 5 results
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Hello Digilent Forum! I have been able to run the Cmod A7 Out of Box Demo and export it to an SDK/Vitis project, then modify memorytest.c to write and read new data to and from the SRAM. What a great demo for getting started with the Cmod A7! However, I would like to configure the external memory controller (AXI EMC) block to use its individual ports -- without using the Cmod A7 board file and the "cellular_ram" port from the EMC_INTF pin of the EMC block. I created a new project that uses the xc7a35tcpg236-1 FPGA (not the board file), edited the constraints XDC file, and pinn
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I followed the directions to a forum that show how to install board files into Vivado. Link: My issue comes when I close Vivado and reopen to create a new project, I don't see an option for selecting a nexys4 ddr board, like if I were looking for a Zybo board. I believe I copied the files over correctly. When selecting a board in Vivado, is it under a different name or would it say "nexy4 ddr"?
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Since you folks an Digilent make these wonderful board files that make it super easy to connect components, I figured I'd make my own for a custom board. The problem is that my design uses a differential sysclock, whereas most Digilent designs use a single-ended sysclock. I have been pouring over the board file chapter in UG895 to figure out how to do this, but unfortunately I haven't found any examples or hints in doing so. A single-ended clock interface in the board.xml file looks like this: <interface mode="slave" name="sys_clock" type="xilinx.com:signal:clock_rtl:1.0" of_
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Ubuntu 14.04 worked on ZYBO Z7-20, but at first Ethernet did not work. The cause was that MDIO of Ethrnet 0 of Peripheral I / O Pins of PS of ZYBO Z7 was connected to EMIO. In the circuit diagram of ZYBO Z7, MDIO is connected to MIO52, MIO53. In the board file, should I connect MDIO of Ethrnet 0 of PS Peripheral I / O Pins to MIO? https://reference.digilentinc.com/_media/reference/programmable-logic/zybo-z7/zybo_z7_sch-public.pdf Currently, since we connected MDIO of Ethrnet 0 of Peripheral I / O Pins of PS of ZYBO Z7 to MIO, Ubuntu 14.04's Ethernet now works on ZYBO -
I followed the directions on how to add the Diligent boards to Vivado for 2015 and later. I have 2016.4 and it did not work. You have to now go to board_parts and then Artix7 and then put the board files (that correspond to Artix) to make this work. It gives worthless errors if you do anything else.
