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Found 4 results

  1. Hello. My system clock on my arty z7-10 board is 125MHz. When I try to simulate this clk in my test bench with a single port RAM, it does not work, and only outputs zeros, however, the simulation does work with a 6.25MHz clock. I looked at the 7 series memory usage guide, and some other xilinx forums, and thye said the BRAM should be able to run at around 200 MHz, so I am not sure why my simulation doesnt. The first picture is the 6.25MHz clock and everything is running fine. The second picture is the 125MHz clock where nothing happens. Testbench is below and sour
  2. Hi I am using Vivado 2016.4 and I am am trying to use the Block RAM IP. There are two options in choosing the mode: BRAM controller and Stand Alone. What is the technical difference between these two? I want to be able to choose the memory width, so should I choose stand alone? Is there any downside?
  3. I unable to resolve the issue please kindly fix this if anyone had experience in this..... img.vhd mat_ply.vhd bram1.coe
  4. I'm having Genesys 2 Kintex 7 board.. i want to display image via VGA from block Ram. I stored pixel value (gray scale) in Block Ram and size of images is 100 * 100 and represent as 8 bits.. Is there is any example?? suggestion?