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Found 3 results

  1. Hello all, I bought the nexys 100T , and since I am new I started with the basic tutorial blinky. Everything goes well until I get to step 8. "Synthesis, Implementation, and Bitstream Generation" The Synthesis ran successfully, and where it fails is at the bitstream generation. Since the Synthesis was completed I am assuming is not the verilog code, and is just some setting that I need to complete. The log gives the following in "Message:" (attached) Please help this is like the most frustrating hello world I ever had to do. I attached my project files and constrain files in ca
  2. Hello all, I bought the nexys 4 DDR, and since I am new I started with the basic tutorial blinky. Everything goes well until I get to step 8. "Synthesis, Implementation, and Bitstream Generation" The Synthesis ran successfully, and where it fails is at the bitstream generation. Since the Synthesis was completed I am assuming is not the verilog code, and is just some setting that I need to complete. The log gives the following error: ERROR: [DRC NSTD-1] Unspecified I/O Standard: 2 out of 2 logical ports use I/O standard (IOSTANDARD) value 'DEFAULT', instead of a user assigned spe
  3. Hello, I created a block diagram that has a axi_gpio_0 block, as you can see in my image. Below is most of my constraint file. My diagram synthesizes, implements and generates a bitstream. I was able to get into SDK with no problems. I am stuck in SDK now. Goal: I am just trying to blink an LED (gpio_io_o[4]) using one of the the example code projects shown in system.mss file. I chose the "xgpio_example.c"; first on the list. The example code has these lines: #define LED 0x01 and #define LED_CHANNEL 1. This code should just simply blink an LED. I am not sure if LED_CHANNE