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Found 4 results

  1. I am having layers of problems with the Pmod MicroSD. My ultimate goal is to get through the wifi example on youtube with a Basys 3. Today I am just trying to do the "hello world" demo for the micro SD Pmod. Issues: [Common 17-69] Command failed: BOARD_PART_PIN cannot be assigned to more than one port ["f:/microSD.srcs/sources_1/bd/microSD_bd/ip/microSD_bd_PmodSD_0_0/microSD_bd_PmodSD_0_0_board.xdc":7] I get this error for 4 pins set_property BOARD_PIN {JB7} [get_ports Pmod_out_pin7_t] set_property BOARD_PIN {JB8} [get_ports Pmod_out_pin8_t] set_property BOARD_PIN {JB9} [get_ports Pmod_out_pin9_t] set_property BOARD_PIN {JB10} [get_ports Pmod_out_pin10_t] Vivado does finish making the bitstream. I then push on incase it works anyway. In the SDK I get another error. 12:28:33 **** Incremental Build of configuration Debug for project uSD **** make all 'Building target: uSD.elf' 'Invoking: MicroBlaze g++ linker' mb-g++ -Wl,-T -Wl,../src/lscript.ld -L../../uSD_bsp/microblaze_0/lib -mlittle-endian -mcpu=v10.0 -mxl-soft-mul -Wl,--no-relax -Wl,--gc-sections -o "uSD.elf" ./src/main.o -Wl,--start-group,-lxil,-lgcc,-lc,-lstdc++,--end-group c:/xilinx/sdk/2018.2/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/7.2.0/../../../../microblaze-xilinx-elf/bin/ld.exe: uSD.elf section `.text' will not fit in region `microblaze_0_local_memory_ilmb_bram_if_cntlr_Mem_microblaze_0_local_memory_dlmb_bram_if_cntlr_Mem' c:/xilinx/sdk/2018.2/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/7.2.0/../../../../microblaze-xilinx-elf/bin/ld.exe: region `microblaze_0_local_memory_ilmb_bram_if_cntlr_Mem_microblaze_0_local_memory_dlmb_bram_if_cntlr_Mem' overflowed by 159832 bytes collect2.exe: error: ld returned 1 exit status make: *** [uSD.elf] Error 1 12:28:35 Build Finished (took 1s.389ms) Without really knowing what I'm doing, I read the error and think I need to allocate more local memory to the microblaze. "overflowed by 159832 bytes" I then open up my block design and try to customize the microblaze but see no place in change the memory it is allocated. I used the address editor and increase the allocated memory for the dlmb to 128K and then the ilmb to 128K. If I try 256K for each the validation fails. Then after this I get a slightly better SDK error. 13:13:22 **** Auto Build of configuration Debug for project uSD **** make all 'Building file: ../src/main.cc' 'Invoking: MicroBlaze g++ compiler' mb-g++ -Wall -O0 -g3 -c -fmessage-length=0 -MT"src/main.o" -I../../uSD_bsp/microblaze_0/include -mlittle-endian -mcpu=v10.0 -mxl-soft-mul -Wl,--no-relax -ffunction-sections -fdata-sections -MMD -MP -MF"src/main.d" -MT"src/main.o" -o "src/main.o" "../src/main.cc" 'Finished building: ../src/main.cc' ' ' 'Building target: uSD.elf' 'Invoking: MicroBlaze g++ linker' mb-g++ -Wl,-T -Wl,../src/lscript.ld -L../../uSD_bsp/microblaze_0/lib -mlittle-endian -mcpu=v10.0 -mxl-soft-mul -Wl,--no-relax -Wl,--gc-sections -o "uSD.elf" ./src/main.o -Wl,--start-group,-lxil,-lgcc,-lc,-lstdc++,--end-group c:/xilinx/sdk/2018.2/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/7.2.0/../../../../microblaze-xilinx-elf/bin/ld.exe: uSD.elf section `.text' will not fit in region `microblaze_0_local_memory_ilmb_bram_if_cntlr_Mem_microblaze_0_local_memory_dlmb_bram_if_cntlr_Mem' c:/xilinx/sdk/2018.2/gnu/microblaze/nt/bin/../lib/gcc/microblaze-xilinx-elf/7.2.0/../../../../microblaze-xilinx-elf/bin/ld.exe: region `microblaze_0_local_memory_ilmb_bram_if_cntlr_Mem_microblaze_0_local_memory_dlmb_bram_if_cntlr_Mem' overflowed by 61528 bytes collect2.exe: error: ld returned 1 exit status make: *** [uSD.elf] Error 1 13:13:25 Build Finished (took 2s.724ms) My over flow is down to 61528 bytes. I am doing all this by following the IPI tutorial and just adding the PmodSD to it. here and here Thanks FBOARC PS I am using Vivado 2018.2 as that is the version in the tutorial.
  2. Tells me PmodWIFI is packaged with board value arty and to update my basys3 to the arty. I am confused. Well hang on a second. It finished generating a bitstream and I see no critical warnings in the project summary. In fact if I tell vivado to discard user generated messages in the messages window, the project has no indication of critical warnings at all. Still confused but closer to my goal.
  3. I am new in VHDL and have a school project. I am reading 40-bit data from DHT11 humidity sensor. Although first 8 bit is meaningful to me, I read all 40. At the end of the transaction, it is required to light 8 LEDs corresponding to each bit of 8bit. I can light the confirmation LED which lights when all 40-bit data is received. But, can’t do it for the data LEDs. I need urgent help. Thanks.
  4. Hi, I created a VHDL description to work with the PS2 interface of a Nexys-3 board, but I'm having a problem with the arrow keys. The right arrow key - code E0 74 - works perfectly, but strangely the other three - codes E0 75, E0 6B and E0 72 - do not! I tested with the Ctrl key - code E0 14 - and with the Alt GR - code E0 11 - and they also work perfectly. Since I was unable to understand the problem, I tried with another board - a Basys-3 - and with Vivado. The behavior was exactly the same. Then I picked up an old Spartan-3E board with a true PS2 connector and the whole arrow keys and the Ctrl and Alt GR worked perfectly (I singled these keys out because they are extended keys like the arrow keys). I'm completely puzzled! Why the same description works in a board and in the other two boards only works with certain keys? The only visible difference among the boards is that the most recent Nexys-3 and Basys-3 use an emulator to emulate PS2, while the old Spartan-3E board does not. May there be the problem? As someone already experienced the same problem? Thank you.